集成12位DAC和ADC的RF 2×2收发器 频段：70 MHz至6.0 GHz 支持TDD和FDD 可调谐通道带宽：<200 kHz至56 MHz 双通道接收器：6路差分或12路单端输入

20230813-中信证券-中国宏观经济高频数据手册

中等容量增强型，32位基于ARM核心的带64或128K字节闪存的微控制器 USB、CAN、7个定时器、2个ADC 、9个通信接口

GM8136 数据手册 The MPEG4/JPEG codec includes the hardware engines to accelerate the computation-intensive tasks, such as the motion estimation, DCT/IDCT, quantization/inverse quantization, and motion compensation. By initializing the control registers of this codec, MPEG4/JPEG codec will automatically perform the motion estimation calculation task for 16x16 or 8x8 block. MPEG4/JPEG codec will also automatically perform the DCT/quantization, IDCT/inverse quantization, AC/DC prediction, zigzag scan, and VLC/VLD calculation task for a macro-block. Therefore, CPU loading can be released from the timing critical tasks in the video encoding process. The features of the MPEG4/JPEG engine include:  Compliant with MPEG4 (ISO/IEC 14496-2) simple profile L0 ~ L3 standards with resolutions of subQCIF, QCIF, CIF, VGA, D1, and 720p with steps of 16 units  Compliant with JPEG (ISO/IEC 10918-1) baseline standard  Includes hardware engines for motion estimation/motion compensation, DCT/IDCT, quantization/inverse quantization, AC/DC prediction, and coding/decoding with variable length  Uses local memory controller to control local memory shared by CPU, MPEG4/JPEG codec, and DMA master  Uses DMA controller to control data transfers between system memory and local memory  Supports automatic power-down mechanism to reduce power consumption  Motion estimation search range: -16 ~ +15.5 (Optionally -32 ~ +31) with half-pixel accuracy  Supports short video header (H.263 baseline)  Supports H.263/MPEG/JPEG quantization methods

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STM32L475端口资源整理及数据手册+LM317/TPS54340/AMS1117等电源芯片输出电阻+SIM7600引脚分配+SPI/I2C/UART/USB/HDMI/VGA/MII/RMII/GMII/RGMII/SGMII/SERDES/接口定义+ATT7022E-26E-28E引脚描述+PCIEx1/x4/x8/x16接口定义

PIC16F1936单片机详细中文数据手册，编程参考。

KF32A156MQV数据手册

KF8A100EOG-ESD-DSD-DTD数据手册V1.1

AXP717寄存器手册