Cyclone10LP FPGA读写SD卡读取BMP图片显示例程源码Quartus17.1工程文件+文档资料,FPGA为CYCLONE10LP系列中的10CL025YU256C8. 完整的Quartus工程文件,可以做为你的学习设计参考。
module top(
input clk,
input rst_n,
input key,
output [3:0] led,
output lcd_dclk,
output lcd_hs, //lcd horizontal synchronization
output lcd_vs, //lcd vertical synchronization
output lcd_de, //lcd data enable
output[7:0] lcd_r, //lcd red
output[7:0] lcd_g, //lcd green
output[7:0] lcd_b, //lcd blue
output lcd_pwm, //LCD PWM backlight control
output sd_ncs, //SD card chip select (SPI mode)
output sd_dclk, //SD card clock
output sd_mosi, //SD card controller data output
input sd_miso, //SD card controller data input
output sdram_clk, //sdram clock
output sdram_cke, //sdram clock enable
output sdram_cs_n, //sdram chip select
output sdram_we_n, //sdram write enable
output sdram_cas_n, //sdram column address strobe
output sdram_ras_n, //sdram row address strobe
output[1:0] sdram_dqm, //sdram data enable
output[1:0] sdram_ba, //sdram bank address
output[12:0] sdram_addr, //sdram address
inout[15:0] sdram_dq //sdram data
);