MIPI Specification 包涵CSI+DSI+D-PHY

PCIe_M.2(NGFF)_Electromechanical_Spec_Rev1.0_Final

相当齐全的usb协议中文版： 第一章至第四章为读者提供了一个纲要，第五章至第十章则提供了USB的所有的具体技术细节。 •外设厂家应着眼于第四章至第十章 •USB的主机控制器应用主要参考第四章至第七章和第九、十章。 •USB 设备驱动厂家主要参考第四、七、九章 《Universal Serial Bus Device Class Specification》一书可以作为本书的补充和参考。各种设备的规范是形形色色的，如有疑问，请与USB Implements Forum索要更多细节。 读者也可以为向操作系统厂商索取关于USB的一些具体特性。

本文档是JTAG_IEEE-Std-1149.1-2001.pdf 官方文档，非扫描版本，可以直接在PDF里面进行关键字所搜，方便大家查阅

TP2915 is a video D/A solution for converting HD digital video signal into the analog domain that is suitable for transmission over single coaxial or twist-pair cable over long reach. The major application is the Automotive interconnect between HD display and HD camera systems or any other applications require robust and low cost transmission of HD video. TP2915 generates the analog video signal complying with HD Transport Video Interface (HD-TVI) format. It is one form of the HD composite video format that is widely adopted in the industry. TP2915 can support a variety of video resolution digital video input standards in 422 or 444 formats over 8, 16 or 24-bit interface with the embedded synchronization (EAV/SAV) header or explicit sync signals. It also accepts 24-bit RGB input with external sync signals. It has the built-in sync extraction logic to obtain the sync information inside the video stream. The video resolutions supported range from SD (NT/PAL) to UHD. TP2915 contains a versatile video timing generator that is programmable for all standards supported and other non-standard video formats. It has programmable clip/shift/scale function to proper condition the input video signal for further processing. It also has an optional 2x over-sampling filters built-in to support higher output sample rate. Over-sampling can relax the external analog filter requirement. TP2915 supports selectable current mode and voltage mode output as well as internal programmable analog reconstruction filter. The built-in data slicer help minimize glue circuits. The signal amplitude of the DAC output can be set by external current setting resistor. It also has built-in color bar test pattern generator for easy testing and adjustment. TP2915 has built-in clock jitter reduction circuit based on local crystal clock to ensure the output signal performance.

此Pdf为pcie3.0总线中文规范。对于pcie设备开发人员必备手册，通过查阅手册可以学习和研发pcie设备知识

204-Pin DDR3 SDRAM Unbuffered SODIMM Design Specification

无密码，大小64M，共3438页。

stdp9320完整的寄存器列表文档，有详细的寄存器功能注解

原版的SAS spec。对SAS SES开发的童鞋应该是有用的