介绍了轨到轨恒定跨导运算放大器输入级电路设计。所提出的电路通过使用虚拟输入差分对动态地改变输入差分对的尾电流来获得恒定跨导gm。引起总跨导gm变化的因素是输入对和虚拟输入对在共模输入电压变化时不能同时生效，当输入对关闭时输入对的尾电流晶体管处于三极管区域 当共模电压变化时，虚拟输入对将在输入对之前从截止区域进入亚阈值区域。在低电源电压设计中，此因素的影响更突出。为了解决这个问题，采用添加补偿电流源到每个虚拟输入差分对的尾电流晶体管，以降低跨导gm的变化。所设计的运算放大器输入级的gm变化误差约为±2％。

基于磁阻传感器HMC1002的弱磁信号采集系统设计、电子技术,开发板制作交流

线性电路设计、模拟电子技术 Preface: This work is based on the work of many other individuals who have been involved with applications and Analog Devices since the company started in 1965. Much of the material that appears in this work is based on work that has appeared in other forms. My major job function in this case was one of editor. The list of people I would like to credit for doing the pioneering work include: Walt Kester, Walt Jung, Paul Brokaw, James Bryant, Chuck Kitchin, and many other members of Analog Devices technical community. In addition many others contributed to the production of this edition by helping out with the production of this book by providing invaluable assistance by proofreading and providing commentary. I especially want to thank Walt Kester, Bob Marwin and Judith Douville, who also did the indexing.

主要内容包括：常用半导体器件、基本放大电路、多级放大电路、集成运算放大电路、放大电路的频率响应、放大电路中的反馈、信号的运算和处理、波形的发生和信号的变换、功率放大电路、直流电源和模拟电子电路读图。

随着集成对数放大电路的发展，其宽动态范围、高精确输出的显著特点，光检测电路也得到不断发展与完善，对数电路具有优异的数据压缩性能，可将很宽的输入动态范围信号压缩在

为了提高信号的检测准确度,简化数字锁相放大器(digital lock-in amplifier,DLIA)的构建电路,将过采样技术应用到DLIA中;并对过采样引发的大存储量和大运算量问题,提出一种算法,从而有效地减小了数据的存储量和运算量。结果表明,该方法在不需要高性能微处理器支持的情况下,提高了DLIA的检测准确度和性价比,缩小了DLIA的体积,并可广泛应用于微弱信号的检测。

CMOS两级运算放大器设计与HSPICE仿真.pdf

低压低功耗CMOS折叠一共源共栅运算放大器、电子技术,开发板制作交流

西电通院2023课程设计-集成运算放大器

为了满足当今对低压低功耗电路的需求,设计了一种工作在0.5 V电源电压环境的全差分运算放大器.电路使用了由衬底驱动的输入级和工作在亚阈值区的输出级,并利用交叉耦合输入晶体管的结构产生负跨导来提高增益.采用0.18μm的CMOS工艺,阈值电压约为0.5 V的器件模型.Hspice仿真结果表明:直流增益为60 dB,单位增益带宽为5.4 MHz,功耗为138μW