RH850_Cube_CC
2017年12月18日前已经一下Driver和编写和测试。
1.Clock controller的代码编写测试，经过OSTM的测试，验证PLL输出的时钟频率可以达到80MHz（最大96MHz）
2.Port部分完成gpio的输入输出操作，成功点亮Led1/Led2(StartBoard),使用复用功能结合中断/异常部分完成INTP按键中断测试。
3.中断/异常部分完成INTP的按键中断测试，OSTM计数器的中断响应
4.OSTM计数器/定时器 定时1us，使用Interval mode 和free-run compare mode
2018年1月3号
1.完成TAUB interval timer function 和PWM output function 的代码编写和测试
2.添加新版的user manual,在1.32版的中发现一些问题。新版改正了。因此TA
2022-05-19 16:30:09
100.86MB
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很详细的瑞萨renesas RH850 RH850F1L 数据手册 datasheet。
2022-03-31 10:58:41
42.36MB
1
官方原版资料 RH850 Family 32 User’s Manual: Software Renesas microcontroller RH850 Family
CHAPTER 1 OVERVIEW ...............................................................................................................1
1.1 V850E3v5 Architecture Features ...........................................................................................1
1.1.1 Multi-processing environment .....................................................................................2
1.1.2 Virtual machines...........................................................................................................2
1.1.3 Hardware multithreading..............................................................................................2
1.2 V850E3v5 Architecture Class ................................................................................................3
1.3 Changes from the V850E2v3 Architecture ............................................................................4
CHAPTER 2 PROCESSOR MODEL ................................................................................................5
2.1 Resource Management ...........................................................................................................5
(1) 3-layer control system..................................................................................................6
(2) 2-layer control system..................................................................................................7
2.2 CPU Operating Modes............................................................................................................8
2.2.1 Definition of CPU operating modes.............................................................................9
(1) Native mode (NM).......................................................................................................9
(2) Virtual machine mode (VM) .......................................................................................9
(3) Supervisor mode (SV) .................................................................................................9
(4) User mode (UM)..........................................................................................................9
2.2.2 CPU operating mode transition .................................................................................... 10
(1) Change due to acknowledging an exception ...............................................................10
(2) Change due to a return instruction...............................................................................10
(3) Change due to a system register instruction................................................................10
2.2.3 CPU operating modes and privileges...........................................................................11
(1) Hypervisor privilege (HV privilege) ...........................................................................12
(2) Supervisor privilege (SV privilege).............................................................................12
(3) Coprocessor use permissions.......................................................................................12
(4) Operation when there is a privilege violation .............................................................13
2.3 Hardware Thread ....................................................................................................................14
2.3.1 Thread status.................................................................................................................14
(1) Enabled/disabled..........................................................................................................14
(2) Stopped/running...........................................................................................................14
2.3.2 Stopping a thread by executing the HALT instruction ................................................15
2.3.3 Pausing a thread by executing the SNOOZE instruction.............................................15
2.4 Instruction Execution..............................................................................................................16
2.5 Exceptions and Interrupts .......................................................................................................17
2.5.1 Types of exceptions......................................................................................................17
(1) Terminating exceptions ...............................................................................................17
(2) Resumable exceptions .................................................................................................17
(3) Pending exceptions ......................................................................................................17
2.5.2 Exception level ................................................................................................................18
2.6 Coprocessors..............................................................................................................................18
2.6.1 Coprocessor use permissions...........................................................................................18
2.6.2 Correspondences between coprocessor use permissions and coprocessors ...................19
2.6.3 Coprocessor unusable exceptions....................................................................................19
2.6.4 System registers...............................................................................................................19
2.7 Registers.....................................................................................................................................20
2.7.1 Program registers.............................................................................................................20
2.7.2 System registers...............................................................................................................20
2.7.3 Register updating.............................................................................................................22
(1) LDSR and STSR..........................................................................................................22
(2) LDTC and STTC .........................................................................................................25
2022-03-16 18:41:51
13MB
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RH850 F1L 单核CPU 系统架构示例代码，有助于学些基础外设和系统构成。同时对于编译器的关联设定参数也有一定参考价值。
2021-12-06 22:26:41
386KB
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官方原版资料
RH850/F1L Group
User’s Manual: Hardware
Renesas microcontroller
RH850 Family
Section 1 Overview........................................................................................................ 63
1.1 RH850/F1L Products Features..................................................................................................... 63
1.1.1 RH850/F1L Functions......................................................................................................... 64
1.1.2 Internal Block Diagram ....................................................................................................... 68
Section 2 Pin Function................................................................................................... 74
2.1 Pin Connection Diagram............................................................................................................... 74
2.2 Pin Description.............................................................................................................................. 96
2.3 Ports and Pin Functions During and After Reset........................................................................ 101
2.4 Port State in Standby Mode........................................................................................................ 101
2.5 Recommended Connection of Unused Pins............................................................................... 102
2.6 RH850/F1L Port Features........................................................................................................... 103
2.6.1 Port Group........................................................................................................................ 103
2.6.2 Port Group Index n ........................................................................................................... 103
2.6.3 Register Base Address..................................................................................................... 103
2.7 Port Functions..........
2021-04-23 17:11:32
44.17MB
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本资源是RH850/F1L的LIN驱动程序。
RH850/F1L是Renesas/瑞萨的一款汽车级的32bit芯片/MCU，内部集成LIN通信控制器。本资源包含使用RLIN27作为LIN master进行通信的例程，和使用RLIN30作为LIN slave进行通信的例程。
适用于使用RH850/F1L芯片进行软件开发的工程师或者单片机学习的人员。
2021-04-14 19:01:52
92KB
本资源是RH850/F1L的LPS驱动程序。
RH850/F1L是Renesas/瑞萨的一款汽车级的32bit芯片/MCU，性能高，功耗低。其内部集成一个低功耗采样器（Low-Power Sampler），用于监测数字I/O引脚，模拟I/O引脚电平电压，从而唤醒处于睡眠模式的芯片。整个监测过程是不需要CPU参与的。本资源包含LPS for Digital例程，LPS for Analog例程。
适用于使用RH850/F1L芯片进行软件开发的工程师或者单片机学习的人员。
2021-04-14 19:01:51
58KB