FPGA中实现VGA-PAL视频转换

[{"title":"（ 86 个子文件 4.87MB ） FPGA中实现VGA-PAL视频转换","children":[{"title":"FPGA中VGA-PAL视频转换","children":[{"title":"电路图.pdf <span style='color:#111;'> 4.82MB </span>","children":null,"spread":false},{"title":"程序","children":[{"title":"VGA_PAL","children":[{"title":"PAL_VGA.map.smsg <span style='color:#111;'> 540B </span>","children":null,"spread":false},{"title":"PAL_VGA.pof <span style='color:#111;'> 2.00MB </span>","children":null,"spread":false},{"title":"hardware","children":[{"title":"YCbCr2RGB.v <span style='color:#111;'> 3.32KB </span>","children":null,"spread":false},{"title":"PAL_VGA.v <span style='color:#111;'> 9.89KB </span>","children":null,"spread":false},{"title":"Reset_Delay.v <span style='color:#111;'> 497B </span>","children":null,"spread":false},{"title":"DIV.v <span style='color:#111;'> 4.24KB </span>","children":null,"spread":false},{"title":"PLL.v <span style='color:#111;'> 13.49KB </span>","children":null,"spread":false},{"title":"I2C_AV_Config.v <span style='color:#111;'> 5.51KB </span>","children":null,"spread":false},{"title":"TD_Detect.v.bak <span style='color:#111;'> 674B </span>","children":null,"spread":false},{"title":"Line_Buffer.v <span style='color:#111;'> 3.94KB </span>","children":null,"spread":false},{"title":"AUDIO_DAC.v <span style='color:#111;'> 8.55KB </span>","children":null,"spread":false},{"title":"TD_Detect.v <span style='color:#111;'> 674B </span>","children":null,"spread":false},{"title":"TP_RAM.v <span style='color:#111;'> 7.70KB </span>","children":null,"spread":false},{"title":"SEG7_LUT.v <span style='color:#111;'> 705B </span>","children":null,"spread":false},{"title":"I2C_AV_Config.v.bak <span style='color:#111;'> 5.51KB </span>","children":null,"spread":false},{"title":"SEG7_LUT_8.v <span style='color:#111;'> 458B </span>","children":null,"spread":false},{"title":"VGA_Ctrl.v <span style='color:#111;'> 2.75KB </span>","children":null,"spread":false},{"title":"I2C_Controller.v <span style='color:#111;'> 3.79KB </span>","children":null,"spread":false},{"title":"PAL_VGA.v.bak <span style='color:#111;'> 10.18KB </span>","children":null,"spread":false},{"title":"YUV422_to_444.v <span style='color:#111;'> 734B </span>","children":null,"spread":false},{"title":"ITU_656_Decoder.v <span style='color:#111;'> 2.75KB </span>","children":null,"spread":false},{"title":"MAC_3.v <span style='color:#111;'> 14.17KB </span>","children":null,"spread":false},{"title":"Sdram_Control_4Port","children":[{"title":"Sdram_Control_4Port.v.bak <span style='color:#111;'> 15.34KB </span>","children":null,"spread":false},{"title":"Sdram_PLL.qip <span style='color:#111;'> 367B </span>","children":null,"spread":false},{"title":"Sdram_Params.h <span style='color:#111;'> 1.51KB </span>","children":null,"spread":false},{"title":"Sdram_PLL.ppf <span style='color:#111;'> 499B </span>","children":null,"spread":false},{"title":"control_interface.v <span style='color:#111;'> 5.68KB </span>","children":null,"spread":false},{"title":"Sdram_WR_FIFO.v <span style='color:#111;'> 7.66KB </span>","children":null,"spread":false},{"title":"Sdram_PLL.v <span style='color:#111;'> 17.01KB </span>","children":null,"spread":false},{"title":"sdr_data_path.v <span style='color:#111;'> 909B </span>","children":null,"spread":false},{"title":"command.v <span style='color:#111;'> 16.67KB </span>","children":null,"spread":false},{"title":"Sdram_PLL.bsf <span style='color:#111;'> 3.85KB </span>","children":null,"spread":false},{"title":"Sdram_RD_FIFO.v <span style='color:#111;'> 7.66KB </span>","children":null,"spread":false},{"title":"Sdram_Params.h.bak <span style='color:#111;'> 1.51KB </span>","children":null,"spread":false},{"title":"Sdram_Control_4Port.v <span style='color:#111;'> 15.34KB </span>","children":null,"spread":false}],"spread":false},{"title":"VGA_Ctrl.v.bak <span style='color:#111;'> 2.75KB </span>","children":null,"spread":false}],"spread":false},{"title":"PAL_VGA.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"Sobel","children":[{"title":"Sobel.v <span style='color:#111;'> 2.39KB </span>","children":null,"spread":false},{"title":"MAC_sobel.v <span style='color:#111;'> 17.85KB </span>","children":null,"spread":false},{"title":"SQRT.v <span style='color:#111;'> 3.55KB </span>","children":null,"spread":false},{"title":"PA_3.v <span style='color:#111;'> 4.29KB </span>","children":null,"spread":false},{"title":"LineBuffer_3.v <span style='color:#111;'> 4.60KB </span>","children":null,"spread":false}],"spread":true},{"title":"PAL_VGA.qsf <span style='color:#111;'> 39.69KB </span>","children":null,"spread":false},{"title":"PAL_VGA.asm.rpt <span style='color:#111;'> 7.34KB </span>","children":null,"spread":false},{"title":"PAL_VGA.dpf <span style='color:#111;'> 239B </span>","children":null,"spread":false},{"title":"PAL_VGA.sof <span style='color:#111;'> 821.38KB </span>","children":null,"spread":false},{"title":"PAL_VGA.tcl.bak <span style='color:#111;'> 41.58KB </span>","children":null,"spread":false},{"title":"PAL_VGA.map.summary <span style='color:#111;'> 473B </span>","children":null,"spread":false},{"title":"PAL_VGA.tan.rpt <span style='color:#111;'> 662.48KB </span>","children":null,"spread":false},{"title":"PAL_VGA.fit.smsg <span style='color:#111;'> 513B </span>","children":null,"spread":false},{"title":"release","children":null,"spread":false},{"title":"PAL_VGA.fit.summary <span style='color:#111;'> 615B </span>","children":null,"spread":false},{"title":"PAL_VGA.pin <span style='color:#111;'> 56.76KB </span>","children":null,"spread":false},{"title":"PAL_VGA.flow.rpt <span style='color:#111;'> 12.66KB </span>","children":null,"spread":false},{"title":"PAL_VGA.tcl <span style='color:#111;'> 41.56KB </span>","children":null,"spread":false},{"title":"PAL_VGA.qpf <span style='color:#111;'> 1.24KB </span>","children":null,"spread":false},{"title":"PAL_VGA.qws <span style='color:#111;'> 152B </span>","children":null,"spread":false},{"title":"PAL_VGA.fit.rpt <span style='color:#111;'> 293.19KB </span>","children":null,"spread":false},{"title":"PAL_VGA.map.rpt <span style='color:#111;'> 459.14KB </span>","children":null,"spread":false},{"title":"PAL_VGA.tan.summary <span style='color:#111;'> 4.53KB </span>","children":null,"spread":false},{"title":"incremental_db","children":[{"title":"README <span style='color:#111;'> 653B </span>","children":null,"spread":false},{"title":"compiled_partitions","children":[{"title":"PAL_VGA.root_partition.cmp.re.rcfdb <span style='color:#111;'> 180.92KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.rcfdb <span style='color:#111;'> 159.33KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.map.kpt <span style='color:#111;'> 28.45KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.map.cdb <span style='color:#111;'> 97.25KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.map.dpi <span style='color:#111;'> 13.93KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.hdb <span style='color:#111;'> 70.71KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.map.cdb <span style='color:#111;'> 96.54KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.merge_hb.atm <span style='color:#111;'> 93.04KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.logdb <span style='color:#111;'> 2.50KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.map.dpi <span style='color:#111;'> 14.18KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.map.hdb <span style='color:#111;'> 75.10KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.dfp <span style='color:#111;'> 33B </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.dfp <span style='color:#111;'> 33B </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.kpt <span style='color:#111;'> 197B </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.merge_hb.atm <span style='color:#111;'> 92.65KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.kpt <span style='color:#111;'> 197B </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.hdb <span style='color:#111;'> 71.43KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.logdb <span style='color:#111;'> 2.50KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.cdb <span style='color:#111;'> 137.67KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.cdb <span style='color:#111;'> 139.33KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.map.kpt <span style='color:#111;'> 28.58KB </span>","children":null,"spread":false},{"title":"PAL_VGA.root_partition.cmp.rcfdb <span style='color:#111;'> 160.10KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.cmp.re.rcfdb <span style='color:#111;'> 179.54KB </span>","children":null,"spread":false},{"title":"DE2_70_TV.root_partition.map.hdb <span style='color:#111;'> 76.15KB </span>","children":null,"spread":false}],"spread":false}],"spread":false},{"title":"db","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"程序.rar <span style='color:#111;'> 1.87MB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]