[{"title":"( 2 个子文件 361KB ) 逻辑设计基础","children":[{"title":"VERILOG快速入门","children":[{"title":"VERILOG快速入门","children":[{"title":"Verilog基础知识.pdf <span style='color:#111;'> 316.61KB </span>","children":null,"spread":false},{"title":"Verilog HDL练习题.pdf <span style='color:#111;'> 98.59KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]