计算结构CPU设计 verilog

[{"title":"（ 46 个子文件 369KB ） 计算结构CPU设计 verilog","children":[{"title":"testCUwave1.vwf <span style='color:#111;'> 34.29KB </span>","children":null,"spread":false},{"title":"MiniCPU.qsf <span style='color:#111;'> 3.41KB </span>","children":null,"spread":false},{"title":"ALU.v <span style='color:#111;'> 975B </span>","children":null,"spread":false},{"title":"MM.bdf <span style='color:#111;'> 5.29KB </span>","children":null,"spread":false},{"title":"IRegister.bsf <span style='color:#111;'> 1.93KB </span>","children":null,"spread":false},{"title":"MiniCPU.flow.rpt <span style='color:#111;'> 6.91KB </span>","children":null,"spread":false},{"title":"ALU.v.bak <span style='color:#111;'> 945B </span>","children":null,"spread":false},{"title":"MiniCPU.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"MiniCPU.qws <span style='color:#111;'> 1.22KB </span>","children":null,"spread":false},{"title":"ControlMemo_waveforms.html <span style='color:#111;'> 1.51KB </span>","children":null,"spread":false},{"title":"Registers.v <span style='color:#111;'> 2.96KB </span>","children":null,"spread":false},{"title":"MainMemo_waveforms.html <span style='color:#111;'> 1.73KB </span>","children":null,"spread":false},{"title":"ControlUnit.v <span style='color:#111;'> 3.16KB </span>","children":null,"spread":false},{"title":"verilog40 <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"MiniCPU.sim.rpt <span style='color:#111;'> 820.42KB </span>","children":null,"spread":false},{"title":"Registers.bsf <span style='color:#111;'> 3.52KB </span>","children":null,"spread":false},{"title":"ControlUnit.bsf <span style='color:#111;'> 3.86KB </span>","children":null,"spread":false},{"title":"ControlMemo_bb.v <span style='color:#111;'> 5.76KB </span>","children":null,"spread":false},{"title":"MainMemo_bb.v <span style='color:#111;'> 5.58KB </span>","children":null,"spread":false},{"title":"ControlMemo.bsf <span style='color:#111;'> 2.69KB </span>","children":null,"spread":false},{"title":"ControlMemo_wave0.jpg <span style='color:#111;'> 115.87KB </span>","children":null,"spread":false},{"title":"MARegister.bsf <span style='color:#111;'> 2.29KB </span>","children":null,"spread":false},{"title":"decodeCS.bsf <span style='color:#111;'> 1.59KB </span>","children":null,"spread":false},{"title":"MBRegister.bsf <span style='color:#111;'> 2.30KB </span>","children":null,"spread":false},{"title":"MiniCPU.map.rpt <span style='color:#111;'> 70.43KB </span>","children":null,"spread":false},{"title":"MiniCPU.map.summary <span style='color:#111;'> 463B </span>","children":null,"spread":false},{"title":"ControlMemo.qip <span style='color:#111;'> 378B </span>","children":null,"spread":false},{"title":"ControlMemo_wave1.jpg <span style='color:#111;'> 140.69KB </span>","children":null,"spread":false},{"title":"MainMemo.qip <span style='color:#111;'> 369B </span>","children":null,"spread":false},{"title":"ControlMemo.v <span style='color:#111;'> 7.16KB </span>","children":null,"spread":false},{"title":"MainMemo.v <span style='color:#111;'> 6.98KB </span>","children":null,"spread":false},{"title":"MainMemo.bsf <span style='color:#111;'> 2.48KB </span>","children":null,"spread":false},{"title":"PCounter.bsf <span style='color:#111;'> 2.47KB </span>","children":null,"spread":false},{"title":"testCPU.vwf <span style='color:#111;'> 31.65KB </span>","children":null,"spread":false},{"title":"MM_initial.mif <span style='color:#111;'> 1.42KB </span>","children":null,"spread":false},{"title":"MainMemo_wave0.jpg <span style='color:#111;'> 106.56KB </span>","children":null,"spread":false},{"title":"BRegister.bsf <span style='color:#111;'> 1.93KB </span>","children":null,"spread":false},{"title":"CU.bdf <span style='color:#111;'> 6.06KB </span>","children":null,"spread":false},{"title":"MiniCPU.bdf <span style='color:#111;'> 16.94KB </span>","children":null,"spread":false},{"title":"MainMemo_wave1.jpg <span style='color:#111;'> 135.23KB </span>","children":null,"spread":false},{"title":"Registers.v.bak <span style='color:#111;'> 2.93KB </span>","children":null,"spread":false},{"title":"ALU.bsf <span style='color:#111;'> 2.14KB </span>","children":null,"spread":false},{"title":"MiniCPU.qpf <span style='color:#111;'> 1.23KB </span>","children":null,"spread":false},{"title":"ControlUnit.v.bak <span style='color:#111;'> 3.14KB </span>","children":null,"spread":false},{"title":"CM_initial.mif <span style='color:#111;'> 2.07KB </span>","children":null,"spread":false},{"title":"FLAGRegister.bsf <span style='color:#111;'> 1.94KB </span>","children":null,"spread":false}],"spread":true}]