[{"title":"( 262 个子文件 2.34MB ) 用Verilog写的等效采样程序","children":[{"title":"trig.vhd <span style='color:#111;'> 506B </span>","children":null,"spread":false},{"title":"equivalent_sample.qsf <span style='color:#111;'> 11.93KB </span>","children":null,"spread":false},{"title":"equivalent_sample.sof <span style='color:#111;'> 274.95KB </span>","children":null,"spread":false},{"title":"e_ram_inst.vhd <span style='color:#111;'> 183B </span>","children":null,"spread":false},{"title":"count_n.vhd <span style='color:#111;'> 835B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]