[{"title":"( 4 个子文件 4.33MB ) 跨时钟域问题解决方法.rar","children":[{"title":"跨时钟域问题解决方法","children":[{"title":"跨时钟域信号传输(一)——控制信号篇.docx <span style='color:#111;'> 1.59MB </span>","children":null,"spread":false},{"title":"脉冲检测同步器.docx <span style='color:#111;'> 200.53KB </span>","children":null,"spread":false},{"title":"跨时钟域信号传输(二)——数据信号篇.docx <span style='color:#111;'> 2.48MB </span>","children":null,"spread":false},{"title":"Verilog基本电路设计(包括:时钟域同步、无缝切换、 异步FIFO、去抖滤波)).docx <span style='color:#111;'> 106.79KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]