[{"title":"( 110 个子文件 282KB ) 基于FPGA的频率计,DE2开发板,VHDL","children":[{"title":"pulse50M.bsf <span style='color:#111;'> 1.54KB </span>","children":null,"spread":false},{"title":"plj4.qpf <span style='color:#111;'> 1.25KB </span>","children":null,"spread":false},{"title":"plj4.fit.summary <span style='color:#111;'> 596B </span>","children":null,"spread":false},{"title":"decoder7.bsf <span style='color:#111;'> 1.57KB </span>","children":null,"spread":false},{"title":"pulse10.vhd.bak <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]