[{"title":"( 405 个子文件 10.55MB ) BMD_PCIE.rar","children":[{"title":"implement.bat <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"implement.bat <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"simulate_isim.bat <span style='color:#111;'> 674B </span>","children":null,"spread":false},{"title":"simulate_isim.bat <span style='color:#111;'> 674B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.bgn <span style='color:#111;'> 16.03KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.bit <span style='color:#111;'> 1.42MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.blc <span style='color:#111;'> 929B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.blc <span style='color:#111;'> 929B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.blc <span style='color:#111;'> 929B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.bld <span style='color:#111;'> 11.29KB </span>","children":null,"spread":false},{"title":"trn_mon.cdc <span style='color:#111;'> 23.35KB </span>","children":null,"spread":false},{"title":"trn_mon.cdc <span style='color:#111;'> 23.35KB </span>","children":null,"spread":false},{"title":"trn_mon.cdc <span style='color:#111;'> 22.99KB </span>","children":null,"spread":false},{"title":"ila_pro_0.cdc <span style='color:#111;'> 10.23KB </span>","children":null,"spread":false},{"title":"ila_pro_0.cdc <span style='color:#111;'> 10.23KB </span>","children":null,"spread":false},{"title":"bmd_pcie.cfi <span style='color:#111;'> 455B </span>","children":null,"spread":false},{"title":"coregen.cgc <span style='color:#111;'> 42.88KB </span>","children":null,"spread":false},{"title":"coregen.cgc <span style='color:#111;'> 42.88KB </span>","children":null,"spread":false},{"title":"coregen.cgc <span style='color:#111;'> 15.87KB </span>","children":null,"spread":false},{"title":"coregen.cgc <span style='color:#111;'> 15.87KB </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 520B </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 520B </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 520B </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 520B </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 240B </span>","children":null,"spread":false},{"title":"coregen.cgp <span style='color:#111;'> 240B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.cmd_log <span style='color:#111;'> 1.82KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.cmd_log <span style='color:#111;'> 292B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.cmd_log <span style='color:#111;'> 292B </span>","children":null,"spread":false},{"title":"1.cpj <span style='color:#111;'> 108.32KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_pad.csv <span style='color:#111;'> 19.01KB </span>","children":null,"spread":false},{"title":"wave.do <span style='color:#111;'> 2.08KB </span>","children":null,"spread":false},{"title":"wave.do <span style='color:#111;'> 2.08KB </span>","children":null,"spread":false},{"title":"simulate_mti.do <span style='color:#111;'> 268B </span>","children":null,"spread":false},{"title":"simulate_mti.do <span style='color:#111;'> 268B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.drc <span style='color:#111;'> 9.35KB </span>","children":null,"spread":false},{"title":"board.f <span style='color:#111;'> 1.25KB </span>","children":null,"spread":false},{"title":"board.f <span style='color:#111;'> 1.25KB </span>","children":null,"spread":false},{"title":"BMD_PCIE.gise <span style='color:#111;'> 13.68KB </span>","children":null,"spread":false},{"title":"BMD_PCIE.gise <span style='color:#111;'> 5.64KB </span>","children":null,"spread":false},{"title":"bmd_design.gise <span style='color:#111;'> 1.16KB </span>","children":null,"spread":false},{"title":"bmd_design.gise <span style='color:#111;'> 1.14KB </span>","children":null,"spread":false},{"title":"ila_pro_0.gise <span style='color:#111;'> 1.14KB </span>","children":null,"spread":false},{"title":"ila_pro_0.gise <span style='color:#111;'> 1.14KB </span>","children":null,"spread":false},{"title":"icon_pro.gise <span style='color:#111;'> 1.14KB </span>","children":null,"spread":false},{"title":"icon_pro.gise <span style='color:#111;'> 1.14KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.v.gise <span style='color:#111;'> 1.05KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_summary.html <span style='color:#111;'> 19.56KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_envsettings.html <span style='color:#111;'> 16.94KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_envsettings.html <span style='color:#111;'> 14.81KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_envsettings.html <span style='color:#111;'> 10.05KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_envsettings.html <span style='color:#111;'> 10.05KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_summary.html <span style='color:#111;'> 5.57KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_summary.html <span style='color:#111;'> 5.57KB </span>","children":null,"spread":false},{"title":"par_usage_statistics.html <span style='color:#111;'> 4.06KB </span>","children":null,"spread":false},{"title":"BMD_TX_ENGINE_summary.html <span style='color:#111;'> 3.79KB </span>","children":null,"spread":false},{"title":"pcie_app_s6_summary.html <span style='color:#111;'> 3.79KB </span>","children":null,"spread":false},{"title":"BMD_TX_ENGINE_summary.html <span style='color:#111;'> 3.64KB </span>","children":null,"spread":false},{"title":"pcie_app_s6_summary.html <span style='color:#111;'> 3.64KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_summary.html <span style='color:#111;'> 3.49KB </span>","children":null,"spread":false},{"title":"coregen.log <span style='color:#111;'> 3.39KB </span>","children":null,"spread":false},{"title":"coregen.log <span style='color:#111;'> 2.29KB </span>","children":null,"spread":false},{"title":"coregen.log <span style='color:#111;'> 2.29KB </span>","children":null,"spread":false},{"title":"coregen.log <span style='color:#111;'> 2.27KB </span>","children":null,"spread":false},{"title":"coregen.log <span style='color:#111;'> 2.27KB </span>","children":null,"spread":false},{"title":"webtalk.log <span style='color:#111;'> 267B </span>","children":null,"spread":false},{"title":"webtalk.log <span style='color:#111;'> 267B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.lso <span style='color:#111;'> 6B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.lso <span style='color:#111;'> 6B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.lso <span style='color:#111;'> 6B </span>","children":null,"spread":false},{"title":"netlist.lst <span style='color:#111;'> 75B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_map.map <span style='color:#111;'> 16.80KB </span>","children":null,"spread":false},{"title":"bmd_pcie.mcs <span style='color:#111;'> 3.89MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_map.mrp <span style='color:#111;'> 65.31KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_guide.ncd <span style='color:#111;'> 1.12MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ncd <span style='color:#111;'> 1.12MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_guide.ncd <span style='color:#111;'> 1.12MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_map.ncd <span style='color:#111;'> 584.67KB </span>","children":null,"spread":false},{"title":"bmd_design.ncf <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"bmd_design.ncf <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.ngc <span style='color:#111;'> 1.80MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngc <span style='color:#111;'> 1000.58KB </span>","children":null,"spread":false},{"title":"ila_pro_0.ngc <span style='color:#111;'> 730.60KB </span>","children":null,"spread":false},{"title":"ila_pro_0.ngc <span style='color:#111;'> 730.59KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.ngc <span style='color:#111;'> 351.08KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs.ngc <span style='color:#111;'> 351.08KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngc <span style='color:#111;'> 350.90KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngc <span style='color:#111;'> 350.90KB </span>","children":null,"spread":false},{"title":"icon_pro.ngc <span style='color:#111;'> 31.93KB </span>","children":null,"spread":false},{"title":"icon_pro.ngc <span style='color:#111;'> 31.92KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngd <span style='color:#111;'> 2.55MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_map.ngm <span style='color:#111;'> 4.36MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs_signalbrowser.ngo <span style='color:#111;'> 1000.74KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6_cs_signalbrowser.ngo <span style='color:#111;'> 351.08KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngr <span style='color:#111;'> 2.53MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngr <span style='color:#111;'> 2.53MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.ngr <span style='color:#111;'> 1.17MB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.pad <span style='color:#111;'> 18.98KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.par <span style='color:#111;'> 17.25KB </span>","children":null,"spread":false},{"title":"xilinx_pcie_1_1_ep_s6.pcf <span style='color:#111;'> 440.14KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]