VHDL分频器-占空比50％-将FPGA板上的50Mhz的信号分频为1hz时钟信号

[{"title":"（ 110 个子文件 989KB ） VHDL分频器-占空比50％-将FPGA板上的50Mhz的信号分频为1hz时钟信号","children":[{"title":"div_vhdl.vhd.bak <span style='color:#111;'> 549B </span>","children":null,"spread":false},{"title":"Block1.bdf <span style='color:#111;'> 2.67KB </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.bpm <span style='color:#111;'> 431B </span>","children":null,"spread":false},{"title":"div_vhdl.map.bpm <span style='color:#111;'> 418B </span>","children":null,"spread":false},{"title":"div_vhdl.bsf <span style='color:#111;'> 1.55KB </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.cbp <span style='color:#111;'> 198B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.cdb <span style='color:#111;'> 2.32KB </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.cdb <span style='color:#111;'> 1.58KB </span>","children":null,"spread":false},{"title":"div_vhdl.pre_map.cdb <span style='color:#111;'> 1.55KB </span>","children":null,"spread":false},{"title":"div_vhdl.(0).cnf.cdb <span style='color:#111;'> 1.42KB </span>","children":null,"spread":false},{"title":"div_vhdl.rtlv_sg.cdb <span style='color:#111;'> 1.33KB </span>","children":null,"spread":false},{"title":"div_vhdl.map.cdb <span style='color:#111;'> 1.31KB </span>","children":null,"spread":false},{"title":"div_vhdl.sgdiff.cdb <span style='color:#111;'> 1.22KB </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.map.cdb <span style='color:#111;'> 1.21KB </span>","children":null,"spread":false},{"title":"div_vhdl.map_bb.cdb <span style='color:#111;'> 742B </span>","children":null,"spread":false},{"title":"div_vhdl.(1).cnf.cdb <span style='color:#111;'> 585B </span>","children":null,"spread":false},{"title":"div_vhdl.rtlv_sg_swap.cdb <span style='color:#111;'> 193B </span>","children":null,"spread":false},{"title":"div_vhdl.eco.cdb <span style='color:#111;'> 176B </span>","children":null,"spread":false},{"title":"div_vhdl.sim.cvwf <span style='color:#111;'> 800B </span>","children":null,"spread":false},{"title":"logic_util_heursitic.dat <span style='color:#111;'> 396B </span>","children":null,"spread":false},{"title":"div_vhdl.db_info <span style='color:#111;'> 152B </span>","children":null,"spread":false},{"title":"div_vhdl.tiscmp.fastest_slow_1200mv_85c.ddb <span style='color:#111;'> 101.26KB </span>","children":null,"spread":false},{"title":"div_vhdl.tiscmp.fastest_slow_1200mv_0c.ddb <span style='color:#111;'> 101.22KB </span>","children":null,"spread":false},{"title":"div_vhdl.cmp0.ddb <span style='color:#111;'> 17.14KB </span>","children":null,"spread":false},{"title":"div_vhdl.tis_db_list.ddb <span style='color:#111;'> 212B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.dfp <span style='color:#111;'> 33B </span>","children":null,"spread":false},{"title":"div_vhdl.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.map.dpi <span style='color:#111;'> 731B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.ecobp <span style='color:#111;'> 28B </span>","children":null,"spread":false},{"title":"div_vhdl.map.ecobp <span style='color:#111;'> 28B </span>","children":null,"spread":false},{"title":"div_vhdl.eds_overflow <span style='color:#111;'> 3B </span>","children":null,"spread":false},{"title":"div_vhdl.fnsim.hdb <span style='color:#111;'> 12.84KB </span>","children":null,"spread":false},{"title":"div_vhdl.sgdiff.hdb <span style='color:#111;'> 7.98KB </span>","children":null,"spread":false},{"title":"div_vhdl.pre_map.hdb <span style='color:#111;'> 7.88KB </span>","children":null,"spread":false},{"title":"div_vhdl.rtlv.hdb <span style='color:#111;'> 7.88KB </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.hdb <span style='color:#111;'> 7.85KB </span>","children":null,"spread":false},{"title":"div_vhdl.map.hdb <span style='color:#111;'> 7.60KB </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.hdb <span style='color:#111;'> 7.39KB </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.map.hdb <span style='color:#111;'> 7.23KB </span>","children":null,"spread":false},{"title":"div_vhdl.map_bb.hdb <span style='color:#111;'> 6.80KB </span>","children":null,"spread":false},{"title":"div_vhdl.(0).cnf.hdb <span style='color:#111;'> 755B </span>","children":null,"spread":false},{"title":"div_vhdl.(1).cnf.hdb <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"div_vhdl.hier_info <span style='color:#111;'> 127B </span>","children":null,"spread":false},{"title":"div_vhdl.hif <span style='color:#111;'> 985B </span>","children":null,"spread":false},{"title":"div_vhdl.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd <span style='color:#111;'> 286.46KB </span>","children":null,"spread":false},{"title":"div_vhdl.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd <span style='color:#111;'> 285.84KB </span>","children":null,"spread":false},{"title":"div_vhdl.lpc.html <span style='color:#111;'> 430B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.map.kpt <span style='color:#111;'> 388B </span>","children":null,"spread":false},{"title":"div_vhdl.map.kpt <span style='color:#111;'> 385B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp_merge.kpt <span style='color:#111;'> 223B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.kpt <span style='color:#111;'> 218B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.kpt <span style='color:#111;'> 217B </span>","children":null,"spread":false},{"title":"div_vhdl.map_bb.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"div_vhdl.map.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"div_vhdl.pin <span style='color:#111;'> 15.04KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.qmsg <span style='color:#111;'> 42.41KB </span>","children":null,"spread":false},{"title":"div_vhdl.tan.qmsg <span style='color:#111;'> 18.21KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.tan.qmsg <span style='color:#111;'> 18.21KB </span>","children":null,"spread":false},{"title":"div_vhdl.fit.qmsg <span style='color:#111;'> 17.85KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.fit.qmsg <span style='color:#111;'> 17.85KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.sta.qmsg <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"div_vhdl.sta.qmsg <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"div_vhdl.fnsim.qmsg <span style='color:#111;'> 8.26KB </span>","children":null,"spread":false},{"title":"div_vhdl.map.qmsg <span style='color:#111;'> 4.10KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.map.qmsg <span style='color:#111;'> 3.71KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.sim.qmsg <span style='color:#111;'> 3.34KB </span>","children":null,"spread":false},{"title":"div_vhdl.sim.qmsg <span style='color:#111;'> 2.36KB </span>","children":null,"spread":false},{"title":"div_vhdl.asm.qmsg <span style='color:#111;'> 2.02KB </span>","children":null,"spread":false},{"title":"prev_cmp_div_vhdl.asm.qmsg <span style='color:#111;'> 2.02KB </span>","children":null,"spread":false},{"title":"div_vhdl.qpf <span style='color:#111;'> 1.26KB </span>","children":null,"spread":false},{"title":"div_vhdl.qsf <span style='color:#111;'> 2.75KB </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.rcfdb <span style='color:#111;'> 938B </span>","children":null,"spread":false},{"title":"div_vhdl.root_partition.cmp.re.rcfdb <span style='color:#111;'> 936B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.rdb <span style='color:#111;'> 11.65KB </span>","children":null,"spread":false},{"title":"div_vhdl.sta.rdb <span style='color:#111;'> 11.37KB </span>","children":null,"spread":false},{"title":"div_vhdl.sim.rdb <span style='color:#111;'> 2.75KB </span>","children":null,"spread":false},{"title":"div_vhdl.asm.rdb <span style='color:#111;'> 1.31KB </span>","children":null,"spread":false},{"title":"div_vhdl.lpc.rdb <span style='color:#111;'> 400B </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 653B </span>","children":null,"spread":false},{"title":"div_vhdl.sta.rpt <span style='color:#111;'> 95.04KB </span>","children":null,"spread":false},{"title":"div_vhdl.fit.rpt <span style='color:#111;'> 55.73KB </span>","children":null,"spread":false},{"title":"div_vhdl.sim.rpt <span style='color:#111;'> 19.93KB </span>","children":null,"spread":false},{"title":"div_vhdl.map.rpt <span style='color:#111;'> 19.46KB </span>","children":null,"spread":false},{"title":"div_vhdl.tan.rpt <span style='color:#111;'> 16.54KB </span>","children":null,"spread":false},{"title":"div_vhdl.flow.rpt <span style='color:#111;'> 6.91KB </span>","children":null,"spread":false},{"title":"div_vhdl.asm.rpt <span style='color:#111;'> 6.68KB </span>","children":null,"spread":false},{"title":"div_vhdl.sld_design_entry.sci <span style='color:#111;'> 215B </span>","children":null,"spread":false},{"title":"div_vhdl.sld_design_entry_dsc.sci <span style='color:#111;'> 215B </span>","children":null,"spread":false},{"title":"div_vhdl.simfam <span style='color:#111;'> 10B </span>","children":null,"spread":false},{"title":"div_vhdl.fit.smsg <span style='color:#111;'> 411B </span>","children":null,"spread":false},{"title":"div_vhdl.sof <span style='color:#111;'> 72.36KB </span>","children":null,"spread":false},{"title":"div_vhdl.tan.summary <span style='color:#111;'> 970B </span>","children":null,"spread":false},{"title":"div_vhdl.sta.summary <span style='color:#111;'> 675B </span>","children":null,"spread":false},{"title":"div_vhdl.fit.summary <span style='color:#111;'> 418B </span>","children":null,"spread":false},{"title":"div_vhdl.map.summary <span style='color:#111;'> 327B </span>","children":null,"spread":false},{"title":"div_vhdl.syn_hier_info <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"div_vhdl.cmp.tdb <span style='color:#111;'> 1.69KB </span>","children":null,"spread":false},{"title":"add_sub_osh.tdf <span style='color:#111;'> 5.97KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]