SDRAM控制器，verilog语言编写

[{"title":"（ 8 个子文件 13KB ） SDRAM控制器，verilog语言编写","children":[{"title":"FPGA_SDRAM_Controller-main","children":[{"title":"LICENSE <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false},{"title":"src","children":[{"title":"comprehensive_tb.ucf <span style='color:#111;'> 5.27KB </span>","children":null,"spread":false},{"title":"LED_mux.v <span style='color:#111;'> 2.70KB </span>","children":null,"spread":false},{"title":"debounce_explicit.v <span style='color:#111;'> 2.12KB </span>","children":null,"spread":false},{"title":"bin2bcd.v <span style='color:#111;'> 3.82KB </span>","children":null,"spread":false},{"title":"comprehensive_tb.v <span style='color:#111;'> 6.47KB </span>","children":null,"spread":false},{"title":"sdram_controller.v <span style='color:#111;'> 10.71KB </span>","children":null,"spread":false}],"spread":true},{"title":"README.md <span style='color:#111;'> 2.39KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]