[{"title":"( 144 个子文件 568KB ) clock2.rar_verilog 数字钟_verilog数字钟_数字钟 DE2_数字钟 verilog_数字钟verilog","children":[{"title":"clock.v <span style='color:#111;'> 446B </span>","children":null,"spread":false},{"title":"change.fit.smsg <span style='color:#111;'> 499B </span>","children":null,"spread":false},{"title":"change.pin <span style='color:#111;'> 56.81KB </span>","children":null,"spread":false},{"title":"clk.v.bak <span style='color:#111;'> 248B </span>","children":null,"spread":false},{"title":"clock.pin <span style='color:#111;'> 77.16KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]