[{"title":"( 28 个子文件 92KB ) fpga_hdmi:FPGA HDMI驱动","children":[{"title":"fpga_hdmi-main","children":[{"title":"hdmi_colorbar.srcs","children":[{"title":"constrs_1","children":[{"title":"new","children":[{"title":"hdmi_colorbar.xdc <span style='color:#111;'> 3.91KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"sources_1","children":[{"title":"new","children":[{"title":"vga_pic.v <span style='color:#111;'> 2.72KB </span>","children":null,"spread":false},{"title":"vga_ctrl.v <span style='color:#111;'> 4.01KB </span>","children":null,"spread":false},{"title":"hdmi_colorbar.v <span style='color:#111;'> 3.43KB </span>","children":null,"spread":false},{"title":"hdmi_i2c","children":[{"title":"i2c_ctrl.v <span style='color:#111;'> 12.27KB </span>","children":null,"spread":false},{"title":"hdmi_i2c.v <span style='color:#111;'> 2.11KB </span>","children":null,"spread":false},{"title":"hdmi_cfg.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"ip","children":[{"title":"clk_wiz_0","children":[{"title":"clk_wiz_0_ooc.xdc <span style='color:#111;'> 2.43KB </span>","children":null,"spread":false},{"title":"mmcm_pll_drp_func_us_plus_mmcm.vh <span style='color:#111;'> 31.14KB </span>","children":null,"spread":false},{"title":"mmcm_pll_drp_func_7s_mmcm.vh <span style='color:#111;'> 23.67KB </span>","children":null,"spread":false},{"title":"mmcm_pll_drp_func_7s_pll.vh <span style='color:#111;'> 18.59KB </span>","children":null,"spread":false},{"title":"clk_wiz_0_sim_netlist.v <span style='color:#111;'> 7.10KB </span>","children":null,"spread":false},{"title":"clk_wiz_0_sim_netlist.vhdl <span style='color:#111;'> 6.98KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.v <span style='color:#111;'> 3.88KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.xml <span style='color:#111;'> 288.06KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.xci <span style='color:#111;'> 90.08KB </span>","children":null,"spread":false},{"title":"mmcm_pll_drp_func_us_pll.vh <span style='color:#111;'> 18.32KB </span>","children":null,"spread":false},{"title":"clk_wiz_0_stub.vhdl <span style='color:#111;'> 1.20KB </span>","children":null,"spread":false},{"title":"clk_wiz_0_stub.v <span style='color:#111;'> 1.23KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.xdc <span style='color:#111;'> 2.65KB </span>","children":null,"spread":false},{"title":"doc","children":[{"title":"clk_wiz_v6_0_changelog.txt <span style='color:#111;'> 7.70KB </span>","children":null,"spread":false}],"spread":false},{"title":"mmcm_pll_drp_func_us_mmcm.vh <span style='color:#111;'> 23.66KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.veo <span style='color:#111;'> 3.56KB </span>","children":null,"spread":false},{"title":"clk_wiz_0.dcp <span style='color:#111;'> 9.28KB </span>","children":null,"spread":false},{"title":"mmcm_pll_drp_func_us_plus_pll.vh <span style='color:#111;'> 18.58KB </span>","children":null,"spread":false},{"title":"clk_wiz_0_board.xdc <span style='color:#111;'> 60B </span>","children":null,"spread":false},{"title":"clk_wiz_0_clk_wiz.v <span style='color:#111;'> 6.72KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"README.md <span style='color:#111;'> 29B </span>","children":null,"spread":false}],"spread":true}],"spread":true}]