[{"title":"( 3 个子文件 1.57MB ) 此设计可将Altera FPGA 连接到LVDS 接口模数转换器的起点-电路方案","children":[{"title":"测试数据.pdf <span style='color:#111;'> 911.37KB </span>","children":null,"spread":false},{"title":"原理图.zip <span style='color:#111;'> 815.17KB </span>","children":null,"spread":false},{"title":"FsTIpjE6t2mQoXzhLmOpGN68uLXI.png <span style='color:#111;'> 15.64KB </span>","children":null,"spread":false}],"spread":true}]