[{"title":"( 576 个子文件 1.87MB ) VHDL/EDA实验7个 (原创)","children":[{"title":"Clock.fit.summary <span style='color:#111;'> 598B </span>","children":null,"spread":false},{"title":"Clock.qsf <span style='color:#111;'> 2.93KB </span>","children":null,"spread":false},{"title":"Clock.tan.rpt <span style='color:#111;'> 56.14KB </span>","children":null,"spread":false},{"title":"Clock.flow.rpt <span style='color:#111;'> 7.70KB </span>","children":null,"spread":false},{"title":"Clock.lpc.rdb <span style='color:#111;'> 439B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]