基于fpga的DDS设计工程（VHDL源代码）

[{"title":"（ 197 个子文件 674KB ） 基于fpga的DDS设计工程（VHDL源代码）","children":[{"title":"dds_constant.vhd <span style='color:#111;'> 3.47KB </span>","children":null,"spread":false},{"title":"dds_constant.inc <span style='color:#111;'> 862B </span>","children":null,"spread":false},{"title":"dds_1.tan.summary <span style='color:#111;'> 2.10KB </span>","children":null,"spread":false},{"title":"dds_1.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"CESHI.ptf <span style='color:#111;'> 40.12KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]