32位CPU Verilog 代码

[{"title":"（ 49 个子文件 38KB ） 32位CPU Verilog 代码","children":[{"title":"AZPR_RTL","children":[{"title":"cpu","children":[{"title":"rtl","children":[{"title":"decoder.v <span style='color:#111;'> 10.27KB </span>","children":null,"spread":false},{"title":"mem_stage.v <span style='color:#111;'> 6.82KB </span>","children":null,"spread":false},{"title":"mem_reg.v <span style='color:#111;'> 3.53KB </span>","children":null,"spread":false},{"title":"ctrl.v <span style='color:#111;'> 7.77KB </span>","children":null,"spread":false},{"title":"gpr.v <span style='color:#111;'> 2.06KB </span>","children":null,"spread":false},{"title":"if_reg.v <span style='color:#111;'> 2.09KB </span>","children":null,"spread":false},{"title":"if_stage.v <span style='color:#111;'> 4.02KB </span>","children":null,"spread":false},{"title":"id_stage.v <span style='color:#111;'> 6.98KB </span>","children":null,"spread":false},{"title":"ex_stage.v <span style='color:#111;'> 4.45KB </span>","children":null,"spread":false},{"title":"id_reg.v <span style='color:#111;'> 4.11KB </span>","children":null,"spread":false},{"title":"cpu.v <span style='color:#111;'> 15.88KB </span>","children":null,"spread":false},{"title":"ex_reg.v <span style='color:#111;'> 4.62KB </span>","children":null,"spread":false},{"title":"bus_if.v <span style='color:#111;'> 5.54KB </span>","children":null,"spread":false},{"title":"alu.v <span style='color:#111;'> 2.53KB </span>","children":null,"spread":false},{"title":"spm.v <span style='color:#111;'> 2.46KB </span>","children":null,"spread":false},{"title":"mem_ctrl.v <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false}],"spread":false},{"title":"include","children":[{"title":"cpu.h <span style='color:#111;'> 4.47KB </span>","children":null,"spread":false},{"title":"isa.h <span style='color:#111;'> 3.78KB </span>","children":null,"spread":false},{"title":"spm.h <span style='color:#111;'> 1.34KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"top","children":[{"title":"lib","children":[{"title":"x_s3e_sprom.v <span style='color:#111;'> 981B </span>","children":null,"spread":false},{"title":"x_s3e_dcm.v <span style='color:#111;'> 884B </span>","children":null,"spread":false},{"title":"x_s3e_dpram.v <span style='color:#111;'> 1.86KB </span>","children":null,"spread":false}],"spread":true},{"title":"test","children":[{"title":"chip_top_test.v <span style='color:#111;'> 4.45KB </span>","children":null,"spread":false},{"title":"chip_top.out <span style='color:#111;'> 134.47KB </span>","children":null,"spread":false},{"title":"sim.cmd.txt <span style='color:#111;'> 544B </span>","children":null,"spread":false},{"title":"test.dat <span style='color:#111;'> 126B </span>","children":null,"spread":false}],"spread":true},{"title":"rtl","children":[{"title":"chip_top.v <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false},{"title":"chip.v <span style='color:#111;'> 12.41KB </span>","children":null,"spread":false},{"title":"clk_gen.v <span style='color:#111;'> 1.50KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"nettype.h <span style='color:#111;'> 671B </span>","children":null,"spread":false},{"title":"stddef.h <span style='color:#111;'> 2.36KB </span>","children":null,"spread":false},{"title":"global_config.h <span style='color:#111;'> 2.25KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"io","children":[{"title":"uart","children":[{"title":"rtl","children":[{"title":"uart_tx.v <span style='color:#111;'> 2.80KB </span>","children":null,"spread":false},{"title":"uart.v <span style='color:#111;'> 3.52KB </span>","children":null,"spread":false},{"title":"uart_rx.v <span style='color:#111;'> 2.61KB </span>","children":null,"spread":false},{"title":"uart_ctrl.v <span style='color:#111;'> 3.70KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"uart.h <span style='color:#111;'> 2.66KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"timer","children":[{"title":"rtl","children":[{"title":"timer.v <span style='color:#111;'> 3.77KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"timer.h <span style='color:#111;'> 1.30KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"rom","children":[{"title":"rtl","children":[{"title":"rom.v <span style='color:#111;'> 1.54KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"rom.h <span style='color:#111;'> 1.32KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"gpio","children":[{"title":"rtl","children":[{"title":"gpio.v <span style='color:#111;'> 4.12KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"gpio.h <span style='color:#111;'> 1.23KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"bus","children":[{"title":"rtl","children":[{"title":"bus_slave_mux.v <span style='color:#111;'> 3.24KB </span>","children":null,"spread":false},{"title":"bus_master_mux.v <span style='color:#111;'> 2.81KB </span>","children":null,"spread":false},{"title":"bus_addr_dec.v <span style='color:#111;'> 2.12KB </span>","children":null,"spread":false},{"title":"bus.v <span style='color:#111;'> 7.44KB </span>","children":null,"spread":false},{"title":"bus_arbiter.v <span style='color:#111;'> 3.78KB </span>","children":null,"spread":false}],"spread":true},{"title":"include","children":[{"title":"bus.h <span style='color:#111;'> 1.64KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}],"spread":true}]