Verilog教程.rar

[{"title":"（ 230 个子文件 9.17MB ） Verilog教程.rar","children":[{"title":"第六章 运算和数据流动控制逻辑.doc <span style='color:#111;'> 164.00KB </span>","children":null,"spread":false},{"title":"第四章 不同抽象级别的Verilog HDL模型.doc <span style='color:#111;'> 431.59KB </span>","children":null,"spread":false},{"title":"第三章 Verilog HDL的基本语法.doc <span style='color:#111;'> 918.33KB </span>","children":null,"spread":false},{"title":"第七章 有限状态机和可综合风格的Verilog HDL.doc <span style='color:#111;'> 1.06MB </span>","children":null,"spread":false},{"title":"第一章 数字信号处理计算程序算法和硬线逻辑的基本概念.doc <span style='color:#111;'> 46.00KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]