基于FPGA的红外收发代码

上传者: sinat_15755521 | 上传时间: 2019-12-21 21:06:00 | 文件大小: 356KB | 文件类型: zip
基于FPGA的红外收发的全部程序,实现了红外通信,使用的是verilog代码编写。

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( 34 个子文件 356KB ) 基于FPGA的红外收发代码
16
IrDA.bdf 12.38KB
jk_ff.bsf 2.06KB
IrDAnios.bsf 1.25KB
IrDA_TOP.bdf 16.33KB
reset_counter.bsf 3.24KB
Verilog HDL Files
onchip_memory2_0.v 3.68KB
cpu_0_jtag_debug_module_tck.v 7.81KB
UART.V 1.50KB
Uart_tb.v 1.90KB
epcs_flash_controller_0.v 17.80KB
reset_counter.v 4.40KB
cpu_0_oci_test_bench.v 1.31KB
cpu_0_test_bench.v 27.77KB
IrDAnios_inst.v 296B
cpu_0.v 285.88KB
cpu_0_mult_cell.v 5.98KB
irda_uart_tb.v 2.12KB
PLL.v 14.23KB
IrDAnios.v 203.72KB
irda_uart.v 1.19KB
Status.v 1.77KB
receiver.v 4.38KB
jtag_uart_0.v 22.16KB
transmit.v 3.39KB
RW_Ctr.v 2.05KB
cpu_0_jtag_debug_module_wrapper.v 9.22KB
IrDA_DATABus.v 2.38KB
irendec.v 2.97KB
cpu_0_jtag_debug_module_sysclk.v 6.62KB
irda_uart.bsf 3.43KB
PLL.bsf 2.92KB
irendec.bsf 2.27KB
delay_reset_block.bdf 8.34KB
delay_reset_block.bsf 2.54KB
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