VHDL频率计的设计

上传者: renyanyang1989 | 上传时间: 2019-12-21 20:59:58 | 文件大小: 355KB | 文件类型: rar
VHDL 频率计,可以最小频率是1HZ,最大由FPGA的芯片限制。可以准确测量方波频率。

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