FPGAs.for.Software.Programmers.3319264060

This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer’s point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays. Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples; Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs; Explains the reasons for the energy efficiency and performance benefits of FPGA processing; Provides a user-oriented approach and a sense for where and how to apply FPGA technology. Table of Contents Chapter 1 FPGA Versus Software Programming: Why, When, and How? Chapter 2 High-Level Synthesis Chapter 3 A Quick Tour of High-Level Synthesis Solutions for FPGAs Part I Commercial HLS Solutions Chapter 4 Making FPGAs Accessible with LabVIEW Chapter 5 Spatial Programming with OpenSPL Chapter 6 OpenCL Chapter 7 Big Data and HPC Acceleration with Vivado HLS Chapter 8 Source-to-Source Optimization for HLS Chapter 9 Bluespec SystemVerilog Part II Academic HLS Solutions Chapter 10 LegUp High-Level Synthesis Chapter 11 ROCCC 2.0 Chapter 12 HIPA0.75plus0.75minus0.75100.75cc Part III FPGA Runtime Systems and OS Services Chapter 13 ReconOS Chapter 14 The LEAP FPGA Operating System Part IV SoC and Overlays on FPGAs Chapter 15 Systems-on-Chip on FPGAs Chapter 16 FPGA Overlays