[{"title":"( 40 个子文件 7.82MB ) AD9959电路图(原理+电路)0-200M数字频率合成器","children":[{"title":"DDS_PCB","children":[{"title":"DDS.PcbDoc <span style='color:#111;'> 2.17MB </span>","children":null,"spread":false},{"title":"DDS.PrjPCBStructure <span style='color:#111;'> 45B </span>","children":null,"spread":false},{"title":"DDS.PrjPCB <span style='color:#111;'> 40.64KB </span>","children":null,"spread":false},{"title":"Project Logs for DDS","children":[{"title":"DDS PCB ECO 2019-7-10 8-54-12.LOG <span style='color:#111;'> 122B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 18-42-54.LOG <span style='color:#111;'> 1.40KB </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-10 8-28-01.LOG <span style='color:#111;'> 378B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-9 21-54-55.LOG <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-10 10-14-47.LOG <span style='color:#111;'> 1.43KB </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 11-17-53.LOG <span style='color:#111;'> 279B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 11-27-27.LOG <span style='color:#111;'> 466B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 13-37-51.LOG <span style='color:#111;'> 2.71KB </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 13-38-16.LOG <span style='color:#111;'> 66B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 13-58-19.LOG <span style='color:#111;'> 107B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 10-18-05.LOG <span style='color:#111;'> 222B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 18-36-59.LOG <span style='color:#111;'> 255B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-9 18-51-28.LOG <span style='color:#111;'> 87B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 18-34-57.LOG <span style='color:#111;'> 1.00KB </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 10-24-38.LOG <span style='color:#111;'> 92B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 19-22-22.LOG <span style='color:#111;'> 170B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-12 18-37-37.LOG <span style='color:#111;'> 85B </span>","children":null,"spread":false},{"title":"DDS PCB ECO 2019-7-9 16-36-48.LOG <span style='color:#111;'> 96.55KB </span>","children":null,"spread":false}],"spread":false},{"title":"DDS.OutJob <span style='color:#111;'> 7.84KB </span>","children":null,"spread":false},{"title":"DDS.SchDoc <span style='color:#111;'> 674.50KB </span>","children":null,"spread":false},{"title":"History","children":[{"title":"DDS.~(9).PcbDoc.Zip <span style='color:#111;'> 768.60KB </span>","children":null,"spread":false},{"title":"DDS.~(8).PcbDoc.Zip <span style='color:#111;'> 761.70KB </span>","children":null,"spread":false},{"title":"DDS.~(1).SchDoc.Zip <span style='color:#111;'> 75.08KB </span>","children":null,"spread":false},{"title":"DDS.~(3).PcbDoc.Zip <span style='color:#111;'> 762.52KB </span>","children":null,"spread":false},{"title":"DDS.~(7).PcbDoc.Zip <span style='color:#111;'> 761.39KB </span>","children":null,"spread":false},{"title":"DDS.~(2).PcbDoc.Zip <span style='color:#111;'> 762.44KB </span>","children":null,"spread":false},{"title":"DDS.~(4).SchDoc.Zip <span style='color:#111;'> 75.69KB </span>","children":null,"spread":false},{"title":"DDS.~(4).PcbDoc.Zip <span style='color:#111;'> 755.83KB </span>","children":null,"spread":false},{"title":"DDS.~(6).PcbDoc.Zip <span style='color:#111;'> 761.50KB </span>","children":null,"spread":false},{"title":"DDS.~(5).PcbDoc.Zip <span style='color:#111;'> 761.40KB </span>","children":null,"spread":false},{"title":"DDS.~(1).PcbDoc.Zip <span style='color:#111;'> 762.10KB </span>","children":null,"spread":false},{"title":"DDS.~(1).PrjPCB.Zip <span style='color:#111;'> 5.10KB </span>","children":null,"spread":false},{"title":"DDS.~(3).SchDoc.Zip <span style='color:#111;'> 75.16KB </span>","children":null,"spread":false},{"title":"DDS.~(2).SchDoc.Zip <span style='color:#111;'> 75.15KB </span>","children":null,"spread":false}],"spread":false},{"title":"__Previews","children":[{"title":"DDS.SchDocPreview <span style='color:#111;'> 77.47KB </span>","children":null,"spread":false}],"spread":true},{"title":"Project Outputs for DDS","children":[{"title":"Design Rule Check - DDS.html <span style='color:#111;'> 13.61KB </span>","children":null,"spread":false},{"title":"Design Rule Check - DDS.drc <span style='color:#111;'> 681B </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]