基于FPGA的数字频率计设计

[{"title":"（ 7 个子文件 468KB ） 基于FPGA的数字频率计设计","children":[{"title":"8.17 采用等精度测频原理的频率计程序与仿真.doc <span style='color:#111;'> 172.00KB </span>","children":null,"spread":false},{"title":"框图.vsd <span style='color:#111;'> 55.00KB </span>","children":null,"spread":false},{"title":"8.16 频率计程序设计与仿真.doc <span style='color:#111;'> 135.50KB </span>","children":null,"spread":false},{"title":"等精度原理图.vsd <span style='color:#111;'> 44.00KB </span>","children":null,"spread":false},{"title":"波形图.vsd <span style='color:#111;'> 75.00KB </span>","children":null,"spread":false},{"title":"目录.doc <span style='color:#111;'> 24.50KB </span>","children":null,"spread":false},{"title":"频率测量仪.doc <span style='color:#111;'> 367.54KB </span>","children":null,"spread":false}],"spread":true}]