基于FPGA实现RS232数据发送模块的实现
本资源是基于FPGA实现RS232发送数据模块的设计，可以实现不同波特率的发送。设计文件在RTL文件夹下，测试文件在testbench文件下，电脑上有quartus软件的话，直接点击project文件夹下的QPF文件，可以直接打开工程
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[{"title":"（ 78 个子文件 179KB ） 基于FPGA实现RS232数据发送模块的实现","children":[{"title":"03_uart_tx","children":[{"title":"project","children":[{"title":"uart_tx.qws <span style='color:#111;'> 1.32KB </span>","children":null,"spread":false},{"title":"db","children":[{"title":"uart_tx.map.qmsg <span style='color:#111;'> 5.87KB </span>","children":null,"spread":false},{"title":"uart_tx.(0).cnf.cdb <span style='color:#111;'> 5.93KB </span>","children":null,"spread":false},{"title":"uart_tx.map.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"uart_tx.map_bb.hdb <span style='color:#111;'> 9.52KB </span>","children":null,"spread":false},{"title":"uart_tx.rtlv_sg_swap.cdb <span style='color:#111;'> 204B </span>","children":null,"spread":false},{"title":"uart_tx.map_bb.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"uart_tx.hier_info <span style='color:#111;'> 3.38KB </span>","children":null,"spread":false},{"title":"logic_util_heursitic.dat <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"uart_tx.map.ammdb <span style='color:#111;'> 129B </span>","children":null,"spread":false},{"title":"uart_tx.lpc.txt <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false},{"title":"uart_tx.pti_db_list.ddb <span style='color:#111;'> 246B </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.reg_db.cdb <span style='color:#111;'> 553B </span>","children":null,"spread":false},{"title":"uart_tx.tis_db_list.ddb <span style='color:#111;'> 246B </span>","children":null,"spread":false},{"title":"uart_tx.hif <span style='color:#111;'> 447B </span>","children":null,"spread":false},{"title":"uart_tx.map_bb.cdb <span style='color:#111;'> 1.93KB </span>","children":null,"spread":false},{"title":"uart_tx.tmw_info <span style='color:#111;'> 67B </span>","children":null,"spread":false},{"title":"uart_tx.map.cdb <span style='color:#111;'> 7.62KB </span>","children":null,"spread":false},{"title":"uart_tx.rtlv.hdb <span style='color:#111;'> 11.12KB </span>","children":null,"spread":false},{"title":"uart_tx.map.rdb <span style='color:#111;'> 1.28KB </span>","children":null,"spread":false},{"title":"uart_tx.db_info <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"uart_tx.cmp_merge.kpt <span style='color:#111;'> 207B </span>","children":null,"spread":false},{"title":"uart_tx.lpc.html <span style='color:#111;'> 372B </span>","children":null,"spread":false},{"title":"uart_tx.sld_design_entry_dsc.sci <span style='color:#111;'> 277B </span>","children":null,"spread":false},{"title":"prev_cmp_uart_tx.qmsg <span style='color:#111;'> 4.42KB </span>","children":null,"spread":false},{"title":"uart_tx.smart_action.txt <span style='color:#111;'> 5B </span>","children":null,"spread":false},{"title":"uart_tx.sgdiff.hdb <span style='color:#111;'> 11.57KB </span>","children":null,"spread":false},{"title":"uart_tx.ipinfo <span style='color:#111;'> 163B </span>","children":null,"spread":false},{"title":"uart_tx.cmp.rdb <span style='color:#111;'> 5.98KB </span>","children":null,"spread":false},{"title":"uart_tx.(0).cnf.hdb <span style='color:#111;'> 1.61KB </span>","children":null,"spread":false},{"title":"uart_tx.map.hdb <span style='color:#111;'> 12.53KB </span>","children":null,"spread":false},{"title":"uart_tx.lpc.rdb <span style='color:#111;'> 403B </span>","children":null,"spread":false},{"title":"uart_tx.cbx.xml <span style='color:#111;'> 89B </span>","children":null,"spread":false},{"title":"uart_tx.pre_map.hdb <span style='color:#111;'> 11.19KB </span>","children":null,"spread":false},{"title":"uart_tx.map.kpt <span style='color:#111;'> 1.48KB </span>","children":null,"spread":false},{"title":"uart_tx.sgdiff.cdb <span style='color:#111;'> 7.25KB </span>","children":null,"spread":false},{"title":"uart_tx.sld_design_entry.sci <span style='color:#111;'> 277B </span>","children":null,"spread":false},{"title":"uart_tx.map.bpm <span style='color:#111;'> 765B </span>","children":null,"spread":false},{"title":"uart_tx.rtlv_sg.cdb <span style='color:#111;'> 5.14KB </span>","children":null,"spread":false}],"spread":false},{"title":"incremental_db","children":[{"title":"compiled_partitions","children":[{"title":"uart_tx.root_partition.map.hbdb.cdb <span style='color:#111;'> 1.41KB </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.hbdb.hdb <span style='color:#111;'> 12.27KB </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.dpi <span style='color:#111;'> 714B </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.cdb <span style='color:#111;'> 7.47KB </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.hbdb.hb_info <span style='color:#111;'> 46B </span>","children":null,"spread":false},{"title":"uart_tx.db_info <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.kpt <span style='color:#111;'> 1.50KB </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.hbdb.sig <span style='color:#111;'> 32B </span>","children":null,"spread":false},{"title":"uart_tx.root_partition.map.hdb <span style='color:#111;'> 12.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 653B </span>","children":null,"spread":false}],"spread":true},{"title":"uart_tx.qsf <span style='color:#111;'> 3.75KB </span>","children":null,"spread":false},{"title":"uart_tx_nativelink_simulation.rpt <span style='color:#111;'> 985B </span>","children":null,"spread":false},{"title":"simulation","children":[{"title":"modelsim","children":[{"title":"msim_transcript <span style='color:#111;'> 3.48KB </span>","children":null,"spread":false},{"title":"uart_tx_run_msim_rtl_verilog.do <span style='color:#111;'> 628B </span>","children":null,"spread":false},{"title":"rtl_work","children":[{"title":"_info <span style='color:#111;'> 1.38KB </span>","children":null,"spread":false},{"title":"uart_tx_tb","children":[{"title":"_primary.vhd <span style='color:#111;'> 80B </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 906B </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 10.41KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 1.06KB </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 1.70KB </span>","children":null,"spread":false}],"spread":true},{"title":"uart_tx","children":[{"title":"_primary.vhd <span style='color:#111;'> 429B </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 22.97KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 2.71KB </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 2.51KB </span>","children":null,"spread":false}],"spread":true},{"title":"_temp","children":[{"title":"vlogvd4jrj <span style='color:#111;'> 2.45KB </span>","children":null,"spread":false}],"spread":false},{"title":"_vmake <span style='color:#111;'> 26B </span>","children":null,"spread":false}],"spread":true},{"title":"uart_tx_run_msim_rtl_verilog.do.bak <span style='color:#111;'> 628B </span>","children":null,"spread":false},{"title":"vsim.wlf <span style='color:#111;'> 80.00KB </span>","children":null,"spread":false},{"title":"modelsim.ini <span style='color:#111;'> 10.87KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"output_files","children":[{"title":"uart_tx.flow.rpt <span style='color:#111;'> 8.16KB </span>","children":null,"spread":false},{"title":"uart_tx.map.summary <span style='color:#111;'> 468B </span>","children":null,"spread":false},{"title":"uart_tx.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"uart_tx.map.rpt <span style='color:#111;'> 23.59KB </span>","children":null,"spread":false}],"spread":true},{"title":"uart_tx.qpf <span style='color:#111;'> 1.24KB </span>","children":null,"spread":false}],"spread":true},{"title":"doc","children":null,"spread":false},{"title":"RTL","children":[{"title":"uart_tx.v <span style='color:#111;'> 3.60KB </span>","children":null,"spread":false},{"title":"uart_tx.v.bak <span style='color:#111;'> 76B </span>","children":null,"spread":false}],"spread":true},{"title":"testbench","children":[{"title":"uart_tx_tb.v.bak <span style='color:#111;'> 80B </span>","children":null,"spread":false},{"title":"uart_tx_tb.v <span style='color:#111;'> 1.19KB </span>","children":null,"spread":false}],"spread":true},{"title":"IP","children":null,"spread":false}],"spread":true}],"spread":true}]
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本站所有资源不代表本站的观点或立场，基于网友分享，根据中国法律《信息网络传播权保护条例》第二十二条之规定，若资源存在侵权或相关问题请联系本站客服人员，zhiweidada#qq.com，请把#换成@，本站将给予最大的支持与配合，做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明