信号发生器
基于FPGA的信号发生器原理框图如图3-15a所示。硬件电路包括FPGA、按键、7 段
LED 数码管、高速D/A转换器。利用EDA工具软件QuartusII13.0 完成FPGA 内部数字系统设计，使信号发生器达到要求的功能和指标。
图 3-15a 信号发生器原理框图
依次完成以下实验内容
（1）设计固定频率锯齿波发生器，产生固定频率（f=5MHz/256≈19.5kHz）的锯齿波，
原理框图如图3-15b 所示。CLK0 为频率固定的外部时钟，用示波器观测D/A 转换器输出
的波形。
图3-15b 锯齿波发生器原理框图
（2）设计固定频率正弦波发生器，产生固定频率（f=5MHz/256≈19.5kHz）的正弦信号，正弦信号的每个周期由256 个采样点组成。正弦信号发生器的原理框图如图3-15c所
示。系统中需要增加波形数据存储器。
图3-15c 正弦波发生器原理框图
（3）设计DDS正弦波发生器，利用DDS技术实现输出正弦信号频率步进可调。通过
按键KEY0实现输出正弦信号频率从1kHz、2 kHz 、…、10kHz 变化。输出频率采用两位LED 数码管显示。
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资源详情
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