[{"title":"( 139 个子文件 293KB ) 硬件 实现的卷积神经网络(verilog)_verilog_代码_下载\n\n","children":[{"title":"VGA_Param.h <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"DE2_115_CAMERA.v <span style='color:#111;'> 23.51KB </span>","children":null,"spread":false},{"title":"sdram_pll.bsf <span style='color:#111;'> 4.67KB </span>","children":null,"spread":false},{"title":"cbx_args.txt <span style='color:#111;'> 195B </span>","children":null,"spread":false},{"title":"Line_Buffer.v <span style='color:#111;'> 4.98KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]