DDR2、DDR3、DDR4、DDR5规范

[{"title":"（ 14 个子文件 47.29MB ） DDR2、DDR3、DDR4、DDR5规范","children":[{"title":"DDR","children":[{"title":"内存技术指南(DDR).doc <span style='color:#111;'> 9.59MB </span>","children":null,"spread":false},{"title":"规范","children":[{"title":"DDR3 SDRAM Specification.pdf <span style='color:#111;'> 4.92MB </span>","children":null,"spread":false},{"title":"DDR2 SDRAM Specification.pdf <span style='color:#111;'> 2.78MB </span>","children":null,"spread":false},{"title":"GDDR4 Specific SGRAM Functions.pdf <span style='color:#111;'> 2.36MB </span>","children":null,"spread":false},{"title":"DDR4 SDRAM Specification.pdf <span style='color:#111;'> 3.78MB </span>","children":null,"spread":false},{"title":"JESD79-5DDR5Spec_wrapper6ff851.pdf <span style='color:#111;'> 5.59MB </span>","children":null,"spread":false}],"spread":true},{"title":"DDR2_Layout指导手册.pdf <span style='color:#111;'> 782.95KB </span>","children":null,"spread":false},{"title":"DDR_margin测试指导书.doc <span style='color:#111;'> 5.56MB </span>","children":null,"spread":false},{"title":"DDR系列内存详解及硬件设计规范-Michael.pdf <span style='color:#111;'> 2.66MB </span>","children":null,"spread":false},{"title":"针对DDR2-800和DDR3的PCB信号完整性设计.pdf <span style='color:#111;'> 1.53MB </span>","children":null,"spread":false},{"title":"DDR内存条的设计.pdf <span style='color:#111;'> 3.46MB </span>","children":null,"spread":false},{"title":"DDR设计基础指南2014.5.23.pdf <span style='color:#111;'> 9.57MB </span>","children":null,"spread":false},{"title":"DDR3测试规范.doc <span style='color:#111;'> 1.21MB </span>","children":null,"spread":false},{"title":"DDR布线权威参考设计.pdf <span style='color:#111;'> 1002.06KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]