忆阻器仿真模型Memristor Model

上传者: 34305127 | 上传时间: 2021-03-21 15:17:57 | 文件大小: 1.4MB | 文件类型: ZIP
文件中包含7种不同的忆阻器模型Memristor model, 有Biolek,Generic,Joglekai,Pershin等,可在LTSPICE和Verilog仿真软件上上运行

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[{"title":"( 79 个子文件 1.4MB ) 忆阻器仿真模型Memristor Model","children":[{"title":"memristor-models-4-all-master","children":[{"title":"knowm_model_modified_verilogA_code <span style='color:#111;'> 1B </span>","children":null,"spread":false},{"title":"Biolek","children":[{"title":"LTSpice","children":[{"title":"memristor_biolek.sub <span style='color:#111;'> 850B </span>","children":null,"spread":false},{"title":"memristor_biolek_sim_T.plt <span style='color:#111;'> 627B </span>","children":null,"spread":false},{"title":"Biolek_IV.png <span style='color:#111;'> 100.09KB </span>","children":null,"spread":false},{"title":"memristor_with_state.asy <span style='color:#111;'> 417B </span>","children":null,"spread":false},{"title":"Circuit_Biolek.png <span style='color:#111;'> 60.12KB </span>","children":null,"spread":false},{"title":"memristor_biolek_sim_IV.plt <span style='color:#111;'> 631B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 558B </span>","children":null,"spread":false},{"title":"Biolek_Time.png <span style='color:#111;'> 88.47KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Knowm","children":[{"title":"Xyce","children":[{"title":"knowm.cir <span style='color:#111;'> 309B </span>","children":null,"spread":false},{"title":"N_DEV_MemristorKnowm.h <span style='color:#111;'> 15.44KB </span>","children":null,"spread":false},{"title":"MMSS_Xyce.png <span style='color:#111;'> 67.61KB </span>","children":null,"spread":false},{"title":"Generalized.png <span style='color:#111;'> 62.29KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 452B </span>","children":null,"spread":false},{"title":"N_DEV_MemristorKnowm.C <span style='color:#111;'> 40.57KB </span>","children":null,"spread":false}],"spread":true},{"title":"LTSpice","children":[{"title":"memristor_knowm_sim_T.plt <span style='color:#111;'> 627B </span>","children":null,"spread":false},{"title":"memristor_knowm_sim.asc <span style='color:#111;'> 479B </span>","children":null,"spread":false},{"title":"Knowm_IV.png <span style='color:#111;'> 76.92KB </span>","children":null,"spread":false},{"title":"Circuit_Knowm.png <span style='color:#111;'> 62.19KB </span>","children":null,"spread":false},{"title":"memristor_knowm.sub <span style='color:#111;'> 1.09KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 611B </span>","children":null,"spread":false},{"title":"Knowm_Time.png <span style='color:#111;'> 92.98KB </span>","children":null,"spread":false},{"title":"memristor_knowm_sim_IV.plt <span style='color:#111;'> 631B </span>","children":null,"spread":false}],"spread":true},{"title":"Verilog-A","children":[{"title":"knowm_sim.cir <span style='color:#111;'> 160B </span>","children":null,"spread":false},{"title":"knowm.va <span style='color:#111;'> 2.21KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 760B </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Generic","children":[{"title":"Verilog-A","children":[{"title":"test_hys_orig.cir <span style='color:#111;'> 529B </span>","children":null,"spread":false},{"title":"test_hys_forward.cir <span style='color:#111;'> 131B </span>","children":null,"spread":false},{"title":"test_hys_transient.cir <span style='color:#111;'> 138B </span>","children":null,"spread":false},{"title":"Homotopy_S.png <span style='color:#111;'> 37.31KB </span>","children":null,"spread":false},{"title":"Homotopy_I.png <span style='color:#111;'> 41.57KB </span>","children":null,"spread":false},{"title":"test_hys_reverse.cir <span style='color:#111;'> 131B </span>","children":null,"spread":false},{"title":"AC_and_DC_Sweep.png <span style='color:#111;'> 52.14KB </span>","children":null,"spread":false},{"title":"hys.va <span style='color:#111;'> 562B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 1.13KB </span>","children":null,"spread":false},{"title":"test_hys.cir <span style='color:#111;'> 220B </span>","children":null,"spread":false},{"title":"test_hys_homotopy.cir <span style='color:#111;'> 369B </span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"Pershin","children":[{"title":"Ngspice","children":[{"title":"memristor.cir <span style='color:#111;'> 1.43KB </span>","children":null,"spread":false}],"spread":true},{"title":"README.md <span style='color:#111;'> 441B </span>","children":null,"spread":false}],"spread":true},{"title":"University_of_Michigan","children":[{"title":"LTSpice","children":[{"title":"Circuit_UMich.png <span style='color:#111;'> 60.18KB </span>","children":null,"spread":false},{"title":"memristor_umich_sim.asc <span style='color:#111;'> 474B </span>","children":null,"spread":false},{"title":"memristor_umich_sim_T.plt <span style='color:#111;'> 627B </span>","children":null,"spread":false},{"title":"memristor_umich.sub <span style='color:#111;'> 1.31KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 497B </span>","children":null,"spread":false},{"title":"UMich_Time.png <span style='color:#111;'> 64.05KB </span>","children":null,"spread":false},{"title":"memristor_umich_sim_IV.plt <span style='color:#111;'> 631B </span>","children":null,"spread":false},{"title":"UMich_IV.png <span style='color:#111;'> 55.48KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Joglekar","children":[{"title":"Xyce","children":[{"title":"joglekar.cir <span style='color:#111;'> 286B </span>","children":null,"spread":false},{"title":"N_DEV_MemristorJoglekar.C <span style='color:#111;'> 37.84KB </span>","children":null,"spread":false},{"title":"N_DEV_MemristorJoglekar.h <span style='color:#111;'> 15.26KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 443B </span>","children":null,"spread":false}],"spread":true},{"title":"Verilog-A","children":[{"title":"memristor_sim.png <span style='color:#111;'> 19.54KB </span>","children":null,"spread":false},{"title":"memristor.va <span style='color:#111;'> 2.08KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 458B </span>","children":null,"spread":false},{"title":"memristor_sim.cir <span style='color:#111;'> 149B </span>","children":null,"spread":false}],"spread":true},{"title":"Ltspice","children":[{"title":"memristor_sim.asc <span style='color:#111;'> 404B </span>","children":null,"spread":false},{"title":"memristor.sub <span style='color:#111;'> 1.58KB </span>","children":null,"spread":false},{"title":"memristor.asy <span style='color:#111;'> 397B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 460B </span>","children":null,"spread":false}],"spread":true},{"title":"Ltspice2","children":[{"title":"memristor_joglekar2_sim_T.plt <span style='color:#111;'> 627B </span>","children":null,"spread":false},{"title":"Joglekar_IV.png <span style='color:#111;'> 111.44KB </span>","children":null,"spread":false},{"title":"memristor_joglekar2.sub <span style='color:#111;'> 841B </span>","children":null,"spread":false},{"title":"memristor_joglekar2_sim_IV.plt <span style='color:#111;'> 631B </span>","children":null,"spread":false},{"title":"Circuit_Joglekar.png <span style='color:#111;'> 63.01KB </span>","children":null,"spread":false},{"title":"Joglekar_Time.png <span style='color:#111;'> 117.21KB </span>","children":null,"spread":false},{"title":"memristor_with_state.asy <span style='color:#111;'> 417B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 558B </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":".gitignore <span style='color:#111;'> 60B </span>","children":null,"spread":false},{"title":"Yakopcic","children":[{"title":"Xyce","children":[{"title":"yakopcic.cir <span style='color:#111;'> 279B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 466B </span>","children":null,"spread":false}],"spread":true},{"title":"LTSpice","children":[{"title":"Yakopcic_Time.png <span style='color:#111;'> 70.68KB </span>","children":null,"spread":false},{"title":"memristor_yakopcic.sub <span style='color:#111;'> 1.71KB </span>","children":null,"spread":false},{"title":"memristor_yakopcic_sim_T.plt <span style='color:#111;'> 627B </span>","children":null,"spread":false},{"title":"memristor_yakopcic_sim_IV.plt <span style='color:#111;'> 631B </span>","children":null,"spread":false},{"title":"memristor_yakopcic_sim.asc <span style='color:#111;'> 482B </span>","children":null,"spread":false},{"title":"Circuit_Yakopcic.png <span style='color:#111;'> 62.44KB </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 497B </span>","children":null,"spread":false},{"title":"Yakopcic_IV.png <span style='color:#111;'> 60.54KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"README.md <span style='color:#111;'> 5.77KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]

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