Altium Designer封装库 器件库 原理图库

上传者: 28713413 | 上传时间: 2021-09-04 09:10:11 | 文件大小: 148.45MB | 文件类型: ZIP
自用器件库,所有的封装都在实际项目中使用过

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[{"title":"( 66 个子文件 148.45MB ) Altium Designer封装库 器件库 原理图库","children":[{"title":"常用封装库","children":[{"title":"Xilinx","children":[{"title":"Xilinx Virtex-7.IntLib <span style='color:#111;'> 2.27MB </span>","children":null,"spread":false},{"title":"Xilinx Zynq-7000.IntLib <span style='color:#111;'> 335.50KB </span>","children":null,"spread":false},{"title":"配置芯片","children":[{"title":"Xilinx XCF.IntLib <span style='color:#111;'> 29.00KB </span>","children":null,"spread":false},{"title":"Xilinx XA9500XL.IntLib <span style='color:#111;'> 36.50KB </span>","children":null,"spread":false},{"title":"Xilinx XC9500.IntLib <span style='color:#111;'> 430.00KB </span>","children":null,"spread":false},{"title":"Xilinx XC18V00.IntLib <span style='color:#111;'> 31.00KB </span>","children":null,"spread":false},{"title":"Xilinx XC5200.IntLib <span style='color:#111;'> 332.50KB </span>","children":null,"spread":false},{"title":"Xilinx XC1700.IntLib <span style='color:#111;'> 32.50KB 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9.68MB </span>","children":null,"spread":false},{"title":"AD_Library.IntLib <span style='color:#111;'> 1.14MB </span>","children":null,"spread":false},{"title":"SH_1mm间距连接器_Library.IntLib <span style='color:#111;'> 44.50KB </span>","children":null,"spread":false},{"title":"Memory","children":[{"title":"Micron Memory DDR3 SDRAM.IntLib <span style='color:#111;'> 134.50KB </span>","children":null,"spread":false},{"title":"Micron Memory DDR2 SDRAM.IntLib <span style='color:#111;'> 66.50KB </span>","children":null,"spread":false},{"title":"Winbond Devices.IntLib <span style='color:#111;'> 13.50KB </span>","children":null,"spread":false},{"title":"Micron Memory SDRAM.IntLib <span style='color:#111;'> 142.00KB </span>","children":null,"spread":false}],"spread":true},{"title":"DIN_Connector_Library.IntLib <span style='color:#111;'> 249.50KB </span>","children":null,"spread":false},{"title":"DC插座.IntLib <span style='color:#111;'> 26.00KB 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