[{"title":"( 15 个子文件 4.7MB ) 32位mips处理器","children":[{"title":"ALU","children":[{"title":"ALU-verilog.syn <span style='color:#111;'> 277B </span>","children":null,"spread":false},{"title":"alib-52","children":[{"title":"tt_1v8_25c.db.alib <span style='color:#111;'> 4.66MB </span>","children":null,"spread":false}],"spread":true},{"title":"adder_4bit-verilog.pvl <span style='color:#111;'> 5.61KB </span>","children":null,"spread":false},{"title":"output","children":[{"title":"ALU_map.v <span style='color:#111;'> 15.79KB </span>","children":null,"spread":false}],"spread":true},{"title":"run.tcl <span style='color:#111;'> 1.27KB </span>","children":null,"spread":false},{"title":"reports","children":[{"title":"ALU_power.rpt <span style='color:#111;'> 1.06KB </span>","children":null,"spread":false},{"title":"ALU_area.rpt <span style='color:#111;'> 610B </span>","children":null,"spread":false},{"title":"ALU_timing.rpt <span style='color:#111;'> 2.63KB </span>","children":null,"spread":false}],"spread":true},{"title":"ALU.v <span style='color:#111;'> 2.19KB </span>","children":null,"spread":false},{"title":"ALU-verilog.pvl <span style='color:#111;'> 9.71KB </span>","children":null,"spread":false},{"title":"adder_4bit-verilog.syn <span style='color:#111;'> 284B </span>","children":null,"spread":false},{"title":"default.svf <span style='color:#111;'> 8.25KB </span>","children":null,"spread":false},{"title":"ALU.mr <span style='color:#111;'> 23B </span>","children":null,"spread":false},{"title":"ADDER_4BIT.mr <span style='color:#111;'> 23B </span>","children":null,"spread":false},{"title":"command.log <span style='color:#111;'> 145.78KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]