FPGA中实现SCCB协议

[{"title":"（ 41 个子文件 778KB ） FPGA中实现SCCB协议","children":[{"title":"rtl","children":[{"title":"sccb_dri.v <span style='color:#111;'> 17.47KB </span>","children":null,"spread":false},{"title":"sccb_drive.v <span style='color:#111;'> 13.90KB </span>","children":null,"spread":false}],"spread":true},{"title":"par","children":[{"title":"simulation","children":[{"title":"modelsim","children":[{"title":"msim_transcript <span style='color:#111;'> 26.29KB </span>","children":null,"spread":false},{"title":"rtl_work","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 1.96KB </span>","children":null,"spread":false}],"spread":true},{"title":"sccb_run_msim_rtl_verilog.do <span style='color:#111;'> 1.72KB </span>","children":null,"spread":false},{"title":"verilog_libs","children":[{"title":"altera_mf_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 12.82KB </span>","children":null,"spread":false}],"spread":true},{"title":"lpm_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 5.07KB </span>","children":null,"spread":false}],"spread":true},{"title":"altera_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 5.84KB </span>","children":null,"spread":false}],"spread":true},{"title":"altera_lnsim_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 7.84KB </span>","children":null,"spread":false}],"spread":true},{"title":"sgate_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 3.06KB </span>","children":null,"spread":false}],"spread":true},{"title":"cycloneive_ver","children":[{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 7.14KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}],"spread":true},{"title":"db","children":[{"title":"sccb.tmw_info <span style='color:#111;'> 67B </span>","children":null,"spread":false},{"title":"sccb.smp_dump.txt <span style='color:#111;'> 758B </span>","children":null,"spread":false},{"title":"sccb.sgate_sm.nvd <span style='color:#111;'> 2.97KB </span>","children":null,"spread":false},{"title":"sccb.sgate.nvd <span style='color:#111;'> 17.93KB </span>","children":null,"spread":false},{"title":"sccb.lpc.txt <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false},{"title":"logic_util_heursitic.dat <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"sccb.sgate_sm_bdd.nvd <span style='color:#111;'> 3.41KB </span>","children":null,"spread":false},{"title":"sccb.smart_action.txt <span style='color:#111;'> 5B </span>","children":null,"spread":false}],"spread":true},{"title":"incremental_db","children":[{"title":"compiled_partitions","children":[{"title":"sccb.root_partition.map.hbdb.hb_info <span style='color:#111;'> 46B </span>","children":null,"spread":false},{"title":"sccb.root_partition.map.hbdb.sig <span style='color:#111;'> 32B </span>","children":null,"spread":false},{"title":"sccb.root_partition.map.dpi <span style='color:#111;'> 822B </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 653B </span>","children":null,"spread":false}],"spread":true},{"title":"sccb.qpf <span style='color:#111;'> 1.24KB </span>","children":null,"spread":false},{"title":"output_files","children":[{"title":"sccb.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"sccb.map.summary <span style='color:#111;'> 470B </span>","children":null,"spread":false}],"spread":true},{"title":"sccb.qsf <span style='color:#111;'> 3.89KB </span>","children":null,"spread":false}],"spread":true},{"title":"doc","children":[{"title":"状态转移图.jpg <span style='color:#111;'> 69.75KB </span>","children":null,"spread":false},{"title":"输出波形.jpg <span style='color:#111;'> 336.77KB </span>","children":null,"spread":false},{"title":"状态转移条件.jpg <span style='color:#111;'> 130.57KB </span>","children":null,"spread":false},{"title":"Seril Camera Control Bus(SCCB).pdf <span style='color:#111;'> 296.19KB </span>","children":null,"spread":false},{"title":"SCCB时序.jpg <span style='color:#111;'> 133.52KB </span>","children":null,"spread":false}],"spread":true},{"title":"sim","children":[{"title":"EEPROM_AT24C64.v <span style='color:#111;'> 5.47KB </span>","children":null,"spread":false},{"title":"sccb_dri_tb.v <span style='color:#111;'> 2.69KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]