[{"title":"( 101 个子文件 503KB ) 实测亲测xilinx fpga uart 串口rs232例子实例工程,不出错发送接收数据测试,节省资源3根线串口,可以学习ip core用法verilog写","children":[{"title":"PLL150M_bb.v <span style='color:#111;'> 10.72KB </span>","children":null,"spread":false},{"title":"PLL150M.ppf <span style='color:#111;'> 352B </span>","children":null,"spread":false},{"title":"uart_test.sof <span style='color:#111;'> 137.23KB </span>","children":null,"spread":false},{"title":"PLL150M.qip <span style='color:#111;'> 448B </span>","children":null,"spread":false},{"title":"uart_test.map.rpt <span style='color:#111;'> 65.35KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]