[{"title":"( 9 个子文件 3.18MB ) 数字逻辑与数字系统实验报告","children":[{"title":"全加器.doc <span style='color:#111;'> 264.50KB </span>","children":null,"spread":false},{"title":"门延时测试与组合逻辑电路设装测2 .doc <span style='color:#111;'> 869.50KB </span>","children":null,"spread":false},{"title":"集成计数器及应用.doc <span style='color:#111;'> 295.50KB </span>","children":null,"spread":false},{"title":"四相时钟分配器.doc <span style='color:#111;'> 191.50KB </span>","children":null,"spread":false},{"title":"触发器.doc <span style='color:#111;'> 1.83MB </span>","children":null,"spread":false},{"title":"中规模集成电路功能测试及应用.doc <span style='color:#111;'> 192.00KB </span>","children":null,"spread":false},{"title":"三态门特性研究和典型应用.doc <span style='color:#111;'> 104.50KB </span>","children":null,"spread":false},{"title":"移位寄存器及其应用.doc <span style='color:#111;'> 209.50KB </span>","children":null,"spread":false},{"title":"基本逻辑门实验.doc <span style='color:#111;'> 129.50KB </span>","children":null,"spread":false}],"spread":true}]