基于verilog语言的mips的CPU模型

[{"title":"（ 6 个子文件 5KB ） 基于verilog语言的mips的CPU模型","children":[{"title":"CPU","children":[{"title":"Idecode32.v <span style='color:#111;'> 2.31KB </span>","children":null,"spread":false},{"title":"Ifetc32.v <span style='color:#111;'> 1.42KB </span>","children":null,"spread":false},{"title":"Executs32.v <span style='color:#111;'> 10.98KB </span>","children":null,"spread":false},{"title":"control32.v <span style='color:#111;'> 1.92KB </span>","children":null,"spread":false},{"title":"minisys.v <span style='color:#111;'> 2.42KB </span>","children":null,"spread":false},{"title":"dmemory32.v <span style='color:#111;'> 622B </span>","children":null,"spread":false}],"spread":true}],"spread":true}]