上传者: l840854893
|
上传时间: 2021-09-08 14:14:51
|
文件大小: 2KB
|
文件类型: VHD
用VHDL语言编写的彩条显示,部分程序如下:
architecture behave of VGA is
-- horizontal timing signals
constant h_data: integer:=640;
constant h_front: integer:=16;
constant h_back: integer:=48;
constant h_sync: integer:=96;
constant h_period: integer:= h_sync + h_data + h_front + h_back;
-- vertical timing signals
constant v_data: integer:=480;
constant v_front: integer:=11;
constant v_back: integer:=32;
constant v_sync: integer:=2;
constant v_period: integer:= v_sync + v_data + v_front + v_back;
signal henable, venable : std_logic;
signal clk50M : std_logic;
signal hcnt: std_logic_vector(9 downto 0); -- horizontal pixel counter
signal vcnt: std_logic_vector(9 downto 0); -- vertical line counter