DS18B20 FPGA VHDL

[{"title":"（ 103 个子文件 1.64MB ） DS18B20 FPGA VHDL","children":[{"title":"DS18B20_assignment_defaults.qdf <span style='color:#111;'> 42.96KB </span>","children":null,"spread":false},{"title":"DS18B20.flow.rpt <span style='color:#111;'> 7.33KB </span>","children":null,"spread":false},{"title":"DS18B20.pin <span style='color:#111;'> 19.53KB </span>","children":null,"spread":false},{"title":"DS18B20.sof <span style='color:#111;'> 147.82KB </span>","children":null,"spread":false},{"title":"DS18B20.sta.summary <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]