[{"title":"( 13 个子文件 6.91MB ) verilog,VHDL转换工具","children":[{"title":"verilog_vhdl","children":[{"title":"v2v","children":[{"title":"操作过程.txt <span style='color:#111;'> 437B </span>","children":null,"spread":false},{"title":".xhdl3.xref <span style='color:#111;'> 227B </span>","children":null,"spread":false},{"title":"verilog_result","children":[{"title":"vhdl_result","children":[{"title":"jtag_logic.vhd <span style='color:#111;'> 10.28KB </span>","children":null,"spread":false},{"title":".xhdl3.comp.xref <span style='color:#111;'> 10.45KB </span>","children":null,"spread":false}],"spread":true},{"title":".xhdl3.xref <span style='color:#111;'> 228B </span>","children":null,"spread":false},{"title":"jtag_logic_s.v <span style='color:#111;'> 9.13KB </span>","children":null,"spread":false},{"title":".xhdl3_data","children":[{"title":"jtag_logic.symb <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"jtag_logic.code <span style='color:#111;'> 1.83KB </span>","children":null,"spread":false}],"spread":true},{"title":".xhdl3.comp.xref <span style='color:#111;'> 5.51KB </span>","children":null,"spread":false}],"spread":true},{"title":"blaster_logic.vhd <span style='color:#111;'> 7.02KB </span>","children":null,"spread":false}],"spread":true},{"title":"xhdl安装使用过程.exe <span style='color:#111;'> 3.95MB </span>","children":null,"spread":false},{"title":"X-HDL_v3.2.37.zip <span style='color:#111;'> 3.78MB </span>","children":null,"spread":false},{"title":"操作过程.txt <span style='color:#111;'> 437B </span>","children":null,"spread":false}],"spread":true}],"spread":true}]