Xilinx ISE11.1的跑马灯程序,基于Spartan-3AN

上传者: dijkstar | 上传时间: 2019-12-21 19:39:29 | 文件大小: 47KB | 文件类型: rar
Xilinx ISE 11.1的跑马灯程序,是基于Spartan-3AN入门板套件的,里面就两个关键文件,一个是verilog源文件(TestLED.v),一个用户约束文件TestLED.ucf(不是Spartan-3AN类型平台,对照你自己的板卡引脚说明文档相应修改即可),自己只需把这两个文件添加到工程中,然后综合,再创建bit下载文件,用iMpact烧录到器件中。这是初学者学习FPGA非常直观的一个入门实例。

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[{"title":"( 74 个子文件 47KB ) Xilinx ISE11.1的跑马灯程序,基于Spartan-3AN","children":[{"title":"TestLED","children":[{"title":"TestLED_summary.html <span style='color:#111;'> 3.22KB </span>","children":null,"spread":false},{"title":"TestLED.v <span style='color:#111;'> 586B </span>","children":null,"spread":false},{"title":"TestLED.gise <span style='color:#111;'> 1.03KB </span>","children":null,"spread":false},{"title":"TestLED_xdb","children":[{"title":"tmp","children":[{"title":"ise","children":[{"title":"__OBJSTORE__","children":[{"title":"_ProjRepoInternal_","children":null,"spread":false},{"title":"ProjectNavigator","children":[{"title":"dpm_project_main","children":[{"title":"dpm_project_main <span style='color:#111;'> 25B </span>","children":null,"spread":false},{"title":"dpm_project_main_StrTbl <span style='color:#111;'> 10B </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"WebTalk","children":null,"spread":false},{"title":"ProjectNavigatorGui","children":[{"title":"Process-SynthesisOnly- <span style='color:#111;'> 71B </span>","children":null,"spread":false},{"title":"Process-SynthesisOnly-DESUT_VERILOG <span style='color:#111;'> 71B </span>","children":null,"spread":false},{"title":"Process-SynthesisOnly-DESUT_UCF <span style='color:#111;'> 69B </span>","children":null,"spread":false},{"title":"Process-SynthesisOnly-DESUT_UCF_StrTbl <span style='color:#111;'> 131B </span>","children":null,"spread":false},{"title":"Library-SynthesisOnly_StrTbl <span style='color:#111;'> 16B </span>","children":null,"spread":false},{"title":"Source-SynthesisOnly-AutoCompile <span style='color:#111;'> 77B </span>","children":null,"spread":false},{"title":"Process-SynthesisOnly-DESUT_VERILOG_StrTbl <span style='color:#111;'> 183B </span>","children":null,"spread":false},{"title":"Process-SynthesisOnly-_StrTbl <span style='color:#111;'> 177B </span>","children":null,"spread":false},{"title":"CViewSelector_StrTbl <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"CViewSelector <span style='color:#111;'> 27B </span>","children":null,"spread":false},{"title":"File-SynthesisOnly_StrTbl <span style='color:#111;'> 11B </span>","children":null,"spread":false},{"title":"Library-SynthesisOnly <span style='color:#111;'> 61B </span>","children":null,"spread":false},{"title":"File-SynthesisOnly <span style='color:#111;'> 63B </span>","children":null,"spread":false},{"title":"Source-SynthesisOnly-AutoCompile_StrTbl <span style='color:#111;'> 19B </span>","children":null,"spread":false}],"spread":false},{"title":"HierarchicalDesign","children":[{"title":"HDProject","children":[{"title":"HDProject_StrTbl <span style='color:#111;'> 84B </span>","children":null,"spread":false},{"title":"HDProject <span style='color:#111;'> 273B </span>","children":null,"spread":false}],"spread":true},{"title":"__stored_object_table__ <span style='color:#111;'> 60B </span>","children":null,"spread":false}],"spread":true},{"title":"common","children":null,"spread":false},{"title":"PnAutoRun","children":[{"title":"Scripts","children":[{"title":"RunOnce_tcl_StrTbl <span style='color:#111;'> 3.73KB </span>","children":null,"spread":false},{"title":"RunOnce_tcl <span style='color:#111;'> 27B </span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"xreport","children":[{"title":"Gc_RvReportViewer-Module-DataFactory-Default_StrTbl <span style='color:#111;'> 15.34KB </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Module-DataFactory-Default <span style='color:#111;'> 387B </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Module-Data-TestLED_StrTbl <span style='color:#111;'> 16.19KB </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Current-Module_StrTbl <span style='color:#111;'> 19B </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Current-Module <span style='color:#111;'> 27B </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Module-Data-TestLED <span style='color:#111;'> 381B </span>","children":null,"spread":false}],"spread":false},{"title":"ProjectNavigator11","children":null,"spread":false},{"title":"Autonym","children":null,"spread":false}],"spread":true},{"title":"version <span style='color:#111;'> 138B </span>","children":null,"spread":false},{"title":"__REGISTRY__","children":[{"title":"xst","children":[{"title":"regkeys <span style='color:#111;'> 43B </span>","children":null,"spread":false}],"spread":true},{"title":"_ProjRepoInternal_","children":[{"title":"regkeys <span style='color:#111;'> 225B </span>","children":null,"spread":false}],"spread":true},{"title":"XSLTProcess","children":[{"title":"regkeys <span style='color:#111;'> 51B </span>","children":null,"spread":false}],"spread":true},{"title":"ProjectNavigator","children":[{"title":"regkeys <span style='color:#111;'> 35B </span>","children":null,"spread":false}],"spread":true},{"title":"cpldfit","children":[{"title":"regkeys <span style='color:#111;'> 47B </span>","children":null,"spread":false}],"spread":false},{"title":"bitinit","children":[{"title":"regkeys <span style='color:#111;'> 47B </span>","children":null,"spread":false}],"spread":false},{"title":"simgen","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"map","children":[{"title":"regkeys <span style='color:#111;'> 43B </span>","children":null,"spread":false}],"spread":false},{"title":"dumpngdio","children":[{"title":"regkeys <span style='color:#111;'> 49B </span>","children":null,"spread":false}],"spread":false},{"title":"bitgen","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"libgen","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"par","children":[{"title":"regkeys <span style='color:#111;'> 43B </span>","children":null,"spread":false}],"spread":false},{"title":"taengine","children":[{"title":"regkeys <span style='color:#111;'> 48B </span>","children":null,"spread":false}],"spread":false},{"title":"fuse","children":[{"title":"regkeys <span style='color:#111;'> 44B </span>","children":null,"spread":false}],"spread":false},{"title":"WebTalk","children":[{"title":"DesignDataCollection","children":[{"title":"regkeys <span style='color:#111;'> 111B </span>","children":null,"spread":false}],"spread":false},{"title":"regkeys <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false},{"title":"vhpcomp","children":[{"title":"regkeys <span style='color:#111;'> 47B </span>","children":null,"spread":false}],"spread":false},{"title":"ProjectNavigatorGui","children":[{"title":"regkeys <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false},{"title":"trce","children":[{"title":"regkeys <span style='color:#111;'> 44B </span>","children":null,"spread":false}],"spread":false},{"title":"runner","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"HierarchicalDesign","children":[{"title":"HDProject","children":[{"title":"regkeys <span style='color:#111;'> 310B </span>","children":null,"spread":false}],"spread":false},{"title":"regkeys <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false},{"title":"common","children":[{"title":"regkeys <span style='color:#111;'> 173B </span>","children":null,"spread":false}],"spread":false},{"title":"xreport","children":[{"title":"regkeys <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false},{"title":"platgen","children":[{"title":"regkeys <span style='color:#111;'> 47B </span>","children":null,"spread":false}],"spread":false},{"title":"hprep6","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"netgen","children":[{"title":"regkeys <span style='color:#111;'> 46B </span>","children":null,"spread":false}],"spread":false},{"title":"ngcbuild","children":[{"title":"regkeys <span style='color:#111;'> 48B </span>","children":null,"spread":false}],"spread":false},{"title":"vlogcomp","children":[{"title":"regkeys <span style='color:#111;'> 48B </span>","children":null,"spread":false}],"spread":false},{"title":"xpwr","children":[{"title":"regkeys <span style='color:#111;'> 44B </span>","children":null,"spread":false}],"spread":false},{"title":"idem","children":[{"title":"regkeys <span style='color:#111;'> 44B </span>","children":null,"spread":false}],"spread":false},{"title":"tsim","children":[{"title":"regkeys <span style='color:#111;'> 44B </span>","children":null,"spread":false}],"spread":false},{"title":"ngdbuild","children":[{"title":"regkeys <span style='color:#111;'> 48B </span>","children":null,"spread":false}],"spread":false},{"title":"ProjectNavigator11","children":[{"title":"regkeys <span style='color:#111;'> 60B </span>","children":null,"spread":false}],"spread":false},{"title":"ngc2edif","children":[{"title":"regkeys <span style='color:#111;'> 48B </span>","children":null,"spread":false}],"spread":false},{"title":"Autonym","children":[{"title":"regkeys <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":true},{"title":"ise.lock <span style='color:#111;'> 87B </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"templates","children":null,"spread":false},{"title":"_xmsgs","children":null,"spread":false},{"title":"ipcore_dir","children":null,"spread":false},{"title":"TestLED.ise <span style='color:#111;'> 46.90KB </span>","children":null,"spread":false},{"title":"TestLED_guide.ncd <span style='color:#111;'> 17.12KB </span>","children":null,"spread":false},{"title":"TestLED.xise <span style='color:#111;'> 2.31KB </span>","children":null,"spread":false},{"title":"TestLED.sig <span style='color:#111;'> 212B </span>","children":null,"spread":false},{"title":"TestLED.cfi <span style='color:#111;'> 415B </span>","children":null,"spread":false},{"title":"TestLED.ucf <span style='color:#111;'> 1.10KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]

评论信息

  • shufan7 :
    适合新手入门学习~
    2018-05-30
  • caolonglove :
    跑马灯很简单。。不错。适合入门学习
    2015-11-24
  • TalkU浩克 :
    非常实用啊!
    2015-11-02
  • leeking189 :
    开始学习verilog,做个跑马灯试试
    2015-06-19
  • z520c :
    非常适合初学者
    2015-04-22

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