全志A64硬件资料

[{"title":"（ 25 个子文件 15.32MB ） 全志A64硬件资料","children":[{"title":"全志A64硬件资料包","children":[{"title":"标案硬件设计说明","children":[{"title":"A64标案原理图设计说明V1_0.pdf <span style='color:#111;'> 467.87KB </span>","children":null,"spread":false},{"title":"A64 PCB Layout Guide V1.0.pdf <span style='color:#111;'> 8.56MB </span>","children":null,"spread":false}],"spread":true},{"title":"元器件支持列表AVL","children":[{"title":"Allwinner NAND flash support list_v1.71_20150615.pdf <span style='color:#111;'> 215.98KB </span>","children":null,"spread":false},{"title":"Allwinner eMMC-tSD-fSD support list_20150612.pdf <span style='color:#111;'> 169.37KB </span>","children":null,"spread":false},{"title":"Allwinner Axx SDRAM Support List-V1.08_20150611.pdf <span style='color:#111;'> 175.56KB </span>","children":null,"spread":false}],"spread":true},{"title":"主控库","children":[{"title":"A64元件封装","children":[{"title":"bga396p0_65b15x15.psm <span style='color:#111;'> 97.48KB </span>","children":null,"spread":false},{"title":"bga396p0_65b15x15.dra <span style='color:#111;'> 186.16KB </span>","children":null,"spread":false}],"spread":true},{"title":"AXP803元件封装","children":[{"title":"qfn69p0_4b8x8.dra <span style='color:#111;'> 140.57KB </span>","children":null,"spread":false},{"title":"qfn69p0_4b8x8.psm <span style='color:#111;'> 28.67KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"标案原理图","children":[{"title":"A64_TABLET_STD_V1_0_162.sch <span style='color:#111;'> 1.29MB </span>","children":null,"spread":false},{"title":"a64_tablet_std_v1_0_165.pdf <span style='color:#111;'> 401.60KB </span>","children":null,"spread":false},{"title":"A64_TABLET_STD_V1_0_162.DSN <span style='color:#111;'> 3.14MB </span>","children":null,"spread":false},{"title":"A64_TABLET_STD_V1_0_165.DSN <span style='color:#111;'> 3.93MB </span>","children":null,"spread":false}],"spread":true},{"title":"DDR Layout模板","children":[{"title":"A64_065_REF_DDR3_16X2_V1_0.rar <span style='color:#111;'> 1.14MB </span>","children":null,"spread":false},{"title":"A64_065_REF_POP_LPDDR2_32X1_V1_0","children":[{"title":"A64_065_REF_LPDDR2_POP_32X1_V1_0.doc <span style='color:#111;'> 173.00KB </span>","children":null,"spread":false},{"title":"A64_065_REF_LPDDR2_POP_32X1_V1_0.brd <span style='color:#111;'> 1.50MB </span>","children":null,"spread":false},{"title":"A64_065_REF_POP_LPDDR2_32X1_V1_0.DSN <span style='color:#111;'> 614.00KB </span>","children":null,"spread":false},{"title":"allegro.jrl <span style='color:#111;'> 2.22KB </span>","children":null,"spread":false},{"title":"A64_065_REF_LPDDR2_POP_32X1_V1_0-163_pads.pcb <span style='color:#111;'> 809.40KB </span>","children":null,"spread":false}],"spread":true},{"title":"A64_065_REF_DDR3_16X2_V1_0","children":[{"title":"A64_0_65_REF_DDR3_16X2_V1_0_20150421.brd <span style='color:#111;'> 1.93MB </span>","children":null,"spread":false},{"title":"A64_0_65_REF_DDR3_16X2_V1_0_layout_note-20150421.doc <span style='color:#111;'> 2.89MB </span>","children":null,"spread":false},{"title":"A64_0_65_REF_DDR3_16X2_V1_0_20150421-VER163.brd <span style='color:#111;'> 1.92MB </span>","children":null,"spread":false},{"title":"A64_0_65_REF_DDR3_16X2_V1_0_20150421.DSN <span style='color:#111;'> 568.50KB </span>","children":null,"spread":false},{"title":"allegro.jrl <span style='color:#111;'> 13.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"A64_065_REF_POP_LPDDR2_32X1_V1_0.zip <span style='color:#111;'> 838.84KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]