CP2102 原理图库+pcb封装库

上传者: cheer_up_bilibili | 上传时间: 2021-03-13 09:17:26 | 文件大小: 55.7MB | 文件类型: RAR
CP2102原理图库+pcb封装库+手册 串口芯片,具体哪搞的忘了,反正一直用的是这个,altium design的库 分享下资源,积分不高

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32.36KB </span>","children":null,"spread":false},{"title":"CP2102.~(11).PcbDoc.Zip <span style='color:#111;'> 6.74MB </span>","children":null,"spread":false},{"title":"3B9CC3DF","children":[{"title":"CP2102.SchLib <span style='color:#111;'> 6.00KB </span>","children":null,"spread":false},{"title":"CP2102.~(3).SchLib.Zip <span style='color:#111;'> 1.69KB </span>","children":null,"spread":false},{"title":"CP2102.~(1).SchLib.Zip <span style='color:#111;'> 1.71KB </span>","children":null,"spread":false},{"title":"CP2102.~(2).SchLib.Zip <span style='color:#111;'> 1.70KB </span>","children":null,"spread":false},{"title":"CP2102.~(4).SchLib.Zip <span style='color:#111;'> 1.94KB </span>","children":null,"spread":false}],"spread":true},{"title":"CP2102.~(5).SchDoc.Zip <span style='color:#111;'> 7.19KB </span>","children":null,"spread":false},{"title":"PCB1.~(22).PcbDoc.Zip <span style='color:#111;'> 34.58KB </span>","children":null,"spread":false},{"title":"CP2102.~(4).PcbLib.Zip <span style='color:#111;'> 19.30KB </span>","children":null,"spread":false},{"title":"PCB1.~(19).PcbDoc.Zip <span style='color:#111;'> 33.68KB </span>","children":null,"spread":false},{"title":"CP2102.~(6).PcbLib.Zip <span style='color:#111;'> 19.42KB </span>","children":null,"spread":false},{"title":"PCB1.~(21).PcbDoc.Zip <span style='color:#111;'> 34.50KB </span>","children":null,"spread":false},{"title":"PCB1.~(4).PcbDoc.Zip <span style='color:#111;'> 33.80KB </span>","children":null,"spread":false},{"title":"CP2102.~(1).PrjPCB.Zip <span style='color:#111;'> 4.68KB </span>","children":null,"spread":false},{"title":"PCB1.~(27).PcbDoc.Zip <span style='color:#111;'> 44.68KB </span>","children":null,"spread":false},{"title":"PCB1.~(3).PcbDoc.Zip <span style='color:#111;'> 32.79KB </span>","children":null,"spread":false},{"title":"PCB1.~(13).PcbDoc.Zip <span style='color:#111;'> 44.72KB </span>","children":null,"spread":false},{"title":"PCB1.~(24).PcbDoc.Zip <span style='color:#111;'> 45.47KB </span>","children":null,"spread":false},{"title":"CP2102.~(4).SchDoc.Zip <span style='color:#111;'> 7.19KB </span>","children":null,"spread":false},{"title":"CP2102.~(12).PcbDoc.Zip <span style='color:#111;'> 6.74MB </span>","children":null,"spread":false},{"title":"CP2102.~(2).PcbLib.Zip <span style='color:#111;'> 19.30KB </span>","children":null,"spread":false},{"title":"PCB1.~(14).PcbDoc.Zip <span style='color:#111;'> 44.70KB </span>","children":null,"spread":false},{"title":"CP2102.~(1).SchDoc.Zip <span style='color:#111;'> 7.69KB </span>","children":null,"spread":false},{"title":"CP2102.~(7).SchDoc.Zip <span style='color:#111;'> 7.18KB </span>","children":null,"spread":false},{"title":"PCB1.~(17).PcbDoc.Zip <span style='color:#111;'> 44.53KB </span>","children":null,"spread":false},{"title":"PCB1.~(26).PcbDoc.Zip <span style='color:#111;'> 46.25KB </span>","children":null,"spread":false},{"title":"CP2102.~(2).PrjPCB.Zip <span style='color:#111;'> 3.62KB </span>","children":null,"spread":false},{"title":"PCB1.~(25).PcbDoc.Zip <span style='color:#111;'> 45.46KB </span>","children":null,"spread":false},{"title":"PCB1.~(2).PcbDoc.Zip <span style='color:#111;'> 32.35KB </span>","children":null,"spread":false},{"title":"CP2102.~(3).PcbLib.Zip <span style='color:#111;'> 19.30KB </span>","children":null,"spread":false},{"title":"CP2102.~(7).PcbDoc.Zip <span style='color:#111;'> 6.74MB </span>","children":null,"spread":false},{"title":"PCB1.~(10).PcbDoc.Zip <span style='color:#111;'> 33.33KB </span>","children":null,"spread":false},{"title":"CP2102.~(1).PcbDoc.Zip <span style='color:#111;'> 11.94KB </span>","children":null,"spread":false},{"title":"CP2102.~(6).SchDoc.Zip <span style='color:#111;'> 7.18KB </span>","children":null,"spread":false},{"title":"PCB1.~(12).PcbDoc.Zip <span style='color:#111;'> 45.65KB </span>","children":null,"spread":false},{"title":"PCB1.~(8).PcbDoc.Zip <span style='color:#111;'> 33.30KB </span>","children":null,"spread":false},{"title":"PCB1.~(20).PcbDoc.Zip <span style='color:#111;'> 34.50KB </span>","children":null,"spread":false},{"title":"CP2102.~(3).SchDoc.Zip <span style='color:#111;'> 7.17KB </span>","children":null,"spread":false},{"title":"PCB1.~(23).PcbDoc.Zip <span style='color:#111;'> 45.65KB </span>","children":null,"spread":false},{"title":"PCB1.~(16).PcbDoc.Zip <span style='color:#111;'> 44.23KB </span>","children":null,"spread":false},{"title":"CP2102.~(1).PcbLib.Zip <span style='color:#111;'> 19.25KB </span>","children":null,"spread":false},{"title":"PCB1.~(1).PcbDoc.Zip <span style='color:#111;'> 48.62KB </span>","children":null,"spread":false},{"title":"CP2102.~(8).SchDoc.Zip <span style='color:#111;'> 7.22KB </span>","children":null,"spread":false},{"title":"PCB1.~(11).PcbDoc.Zip <span style='color:#111;'> 44.77KB </span>","children":null,"spread":false},{"title":"PCB1.~(18).PcbDoc.Zip <span style='color:#111;'> 39.38KB </span>","children":null,"spread":false},{"title":"PCB1.~(5).PcbDoc.Zip <span style='color:#111;'> 33.84KB </span>","children":null,"spread":false},{"title":"PCB1.~(9).PcbDoc.Zip <span style='color:#111;'> 33.33KB </span>","children":null,"spread":false},{"title":"CP2102.~(10).PcbDoc.Zip <span style='color:#111;'> 6.74MB </span>","children":null,"spread":false},{"title":"PCB1.~(6).PcbDoc.Zip <span style='color:#111;'> 33.80KB </span>","children":null,"spread":false}],"spread":false},{"title":"CP2102.SchLib <span style='color:#111;'> 6.00KB </span>","children":null,"spread":false},{"title":"debug.log <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"CP2102.pdf <span style='color:#111;'> 408.75KB </span>","children":null,"spread":false},{"title":"CP2102.PcbLib <span style='color:#111;'> 125.50KB </span>","children":null,"spread":false},{"title":"Project Logs for CP2102","children":[{"title":"CP2102 SCH ECO 2017-4-17 16-45-06.LOG <span style='color:#111;'> 730B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 17-09-43.LOG <span style='color:#111;'> 586B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 17-44-21.LOG <span style='color:#111;'> 287B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-27 17-56-43.LOG <span style='color:#111;'> 287B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-27 17-56-15.LOG <span style='color:#111;'> 97B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 18-15-42.LOG <span style='color:#111;'> 561B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 18-15-12.LOG <span style='color:#111;'> 25B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 17-16-02.LOG <span style='color:#111;'> 312B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-28 10-23-43.LOG <span style='color:#111;'> 139B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 17-04-45.LOG <span style='color:#111;'> 2.33KB </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-17 17-16-51.LOG <span style='color:#111;'> 287B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-27 17-25-45.LOG <span style='color:#111;'> 356B </span>","children":null,"spread":false},{"title":"PCB1 PCB ECO 2017-4-28 10-32-37.LOG <span style='color:#111;'> 92B </span>","children":null,"spread":false},{"title":"CP2102 SCH ECO 2017-4-17 16-44-56.LOG <span style='color:#111;'> 729B </span>","children":null,"spread":false}],"spread":false},{"title":"CP2102.Dat <span style='color:#111;'> 1.89KB </span>","children":null,"spread":false},{"title":"CP2102.PrjPCBStructure <span style='color:#111;'> 48B </span>","children":null,"spread":false},{"title":"CP2102.SchDoc <span style='color:#111;'> 52.00KB </span>","children":null,"spread":false},{"title":"jianpan.PcbLib <span style='color:#111;'> 692.50KB </span>","children":null,"spread":false},{"title":"CP2102.PrjPCB <span style='color:#111;'> 40.39KB </span>","children":null,"spread":false},{"title":"CP2102.PcbDoc <span style='color:#111;'> 6.86MB </span>","children":null,"spread":false},{"title":"PCB1.PcbDoc <span style='color:#111;'> 260.00KB </span>","children":null,"spread":false},{"title":"__Previews","children":[{"title":"PCB1.PcbDocPreview <span style='color:#111;'> 11.27KB </span>","children":null,"spread":false},{"title":"CP2102.SchDocPreview <span style='color:#111;'> 39.52KB </span>","children":null,"spread":false},{"title":"CP2102.PcbDocPreview <span style='color:#111;'> 4.47KB </span>","children":null,"spread":false}],"spread":true},{"title":"Project Outputs for CP2102","children":[{"title":"Design Rule Check - CP2102.drc <span style='color:#111;'> 34.00KB </span>","children":null,"spread":false},{"title":"Design Rule Check - CP2102.html <span style='color:#111;'> 314.16KB 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