基于FPGA的OFDM调制解调系统的仿真，包括matlab代码，verilog代码以及论文设计章节。

[{"title":"（ 918 个子文件 13.94MB ） 基于FPGA的OFDM调制解调系统的仿真，包括matlab代码，verilog代码以及论文设计章节。","children":[{"title":"ram_zeroremove.vhd <span style='color:#111;'> 9.63KB </span>","children":null,"spread":false},{"title":"fftcore_bb.v <span style='color:#111;'> 2.27KB </span>","children":null,"spread":false},{"title":"fifo_zeroremove_inst.vhd <span style='color:#111;'> 211B </span>","children":null,"spread":false},{"title":"ram_cpremovereal.vhd <span style='color:#111;'> 9.67KB </span>","children":null,"spread":false},{"title":"fifo_rsdecoderbuffer.vhd <span style='color:#111;'> 53.38KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]