USB4.0 官方协议/标准 2020

[{"title":"（ 64 个子文件 24.88MB ） USB4.0 官方协议/标准 2020","children":[{"title":"USB4 Specification","children":[{"title":"TMU Simulation","children":[{"title":"TMU Simulation.zip <span style='color:#111;'> 741.12KB </span>","children":null,"spread":false}],"spread":true},{"title":"USB4 1.0 with errata through 20201015 - CLEAN.pdf <span style='color:#111;'> 9.62MB </span>","children":null,"spread":false},{"title":"USB4 1.0 with errata through 20201015 - REDLINE.pdf <span style='color:#111;'> 9.90MB </span>","children":null,"spread":false},{"title":"USB4 ECN for Release","children":[{"title":"USB4 1.0 ECN - Protocol Adapter Path CS Registers.pdf <span style='color:#111;'> 159.62KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Host Interface Receive Frame Mode Single Packet.pdf <span style='color:#111;'> 66.08KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Upstream Adapter RO.pdf <span style='color:#111;'> 144.60KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Default Value for Adapter State Register.pdf <span style='color:#111;'> 91.66KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Support for LTTPR Transparent.pdf <span style='color:#111;'> 813.34KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - PCIe Logical Idle.pdf <span style='color:#111;'> 209.80KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Adding Timeout for Sending LFPS on CLx Exit.pdf <span style='color:#111;'> 62.17KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - TBT3 Adapter CS.pdf <span style='color:#111;'> 77.46KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - tTrainingAbort Action Change.pdf <span style='color:#111;'> 139.01KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Update TBT3 support of L1 and L2.pdf <span style='color:#111;'> 121.23KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP Capability.pdf <span style='color:#111;'> 96.16KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Packet Forwarding Jitter.pdf <span style='color:#111;'> 169.86KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Wake on USB4 Depends on Enable Wake on USB4 Wake.pdf <span style='color:#111;'> 42.59KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Clarify AC Coupling Requirements.pdf <span style='color:#111;'> 66.25KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - CL0s Exit Timeout.pdf <span style='color:#111;'> 111.62KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Master Port May Stop Time Sync Handshake.pdf <span style='color:#111;'> 97.39KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Buffer Allocation Request Operation.pdf <span style='color:#111;'> 120.17KB </span>","children":null,"spread":false},{"title":"USB4 ECN through 20201015","children":[{"title":"USB4 1.0 ECN - Sending TS2 After Bonding State.pdf <span style='color:#111;'> 92.47KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DROM Base Address.pdf <span style='color:#111;'> 99.30KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - LT_LRoff on Downstream Facing Port.pdf <span style='color:#111;'> 141.14KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - HI Memory Order.pdf <span style='color:#111;'> 78.90KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP Link Training Failure.pdf <span style='color:#111;'> 231.11KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Lane Disable Condition.pdf <span style='color:#111;'> 96.74KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - SET_TX_COMPLIANCE Requirement for Skew Between Lanes.pdf <span style='color:#111;'> 148.02KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP Resource Allocation.pdf <span style='color:#111;'> 126.54KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Lock Bit Behavior When Disconnected.pdf <span style='color:#111;'> 110.08KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Exit Sleep when UFP Disconnected.pdf <span style='color:#111;'> 170.41KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Asymmetric RX Primary Flow Change.pdf <span style='color:#111;'> 92.01KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - UFP Sends Notification Packet for Logical Errors After Link Transitions to CL0.pdf <span style='color:#111;'> 70.52KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - TXFFE Preset14 Setting.pdf <span style='color:#111;'> 163.83KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Bonding Error Scenario Addition.pdf <span style='color:#111;'> 168.29KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Training Sub-State Transitions.pdf <span style='color:#111;'> 135.25KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Adding Condition to Deactivate RS-FEC Encoding.pdf <span style='color:#111;'> 114.02KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Storing Credit and TMU Packets.pdf <span style='color:#111;'> 147.48KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Host Router State Machine.pdf <span style='color:#111;'> 222.33KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Self Clear Bits.pdf <span style='color:#111;'> 127.65KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Port Operation Completion.pdf <span style='color:#111;'> 138.11KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Require DROM support for Discrete Host Routers.pdf <span style='color:#111;'> 97.74KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP BW Allocation.pdf <span style='color:#111;'> 576.87KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Router Ready Bit.pdf <span style='color:#111;'> 227.84KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP FEC Jitter.pdf <span style='color:#111;'> 112.20KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - IRQ Delay During and After Link Training.pdf <span style='color:#111;'> 155.36KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Asymmetric TxFFE Change.pdf <span style='color:#111;'> 103.81KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Alignment Error Event.pdf <span style='color:#111;'> 65.64KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Router Detection Change.pdf <span style='color:#111;'> 110.82KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - SR Counter.pdf <span style='color:#111;'> 209.19KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Inter-Domain Time Sync is Optional for Host Routers.pdf <span style='color:#111;'> 159.34KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Hot-Plug Notification Packet from DFP.pdf <span style='color:#111;'> 61.38KB </span>","children":null,"spread":false}],"spread":false},{"title":"USB4 1.0 ECN - Response to Control Adapter Access.pdf <span style='color:#111;'> 122.43KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Adding Disable Time Sync Bit to TMU_ADP_CS_6 - V2.pdf <span style='color:#111;'> 137.12KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Adding Option for DP Wake.pdf <span style='color:#111;'> 55.86KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Change Behavior of Router when Post Time is 0.pdf <span style='color:#111;'> 88.94KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - TBT3 CM Buffer Allocation.pdf <span style='color:#111;'> 123.91KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Modify Common-Mode Return-Loss Mask of Captive Devices.pdf <span style='color:#111;'> 98.17KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Clarify HW Margin Results.pdf <span style='color:#111;'> 185.67KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Change Starting Phase after Sleep.pdf <span style='color:#111;'> 59.58KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - 17 MTPs Vs Sub-MTP TUs.pdf <span style='color:#111;'> 69.33KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - DP Clock Sync Minimum Number of Fixes.pdf <span style='color:#111;'> 182.50KB </span>","children":null,"spread":false},{"title":"USB4 1.0 ECN - Change in ISC and ISS Registers Address.pdf <span style='color:#111;'> 93.78KB </span>","children":null,"spread":false}],"spread":false},{"title":"USB4 Re-Timer Specification Rev 0.96 - 20200615 - CLEAN.pdf <span style='color:#111;'> 1.01MB </span>","children":null,"spread":false},{"title":"USB4 Adopters Agreement August 2019.pdf <span style='color:#111;'> 106.83KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]