[{"title":"( 9 个子文件 376KB ) 基于Verilog的PID控制器IP核","children":[{"title":"pid_controller","children":[{"title":"tags","children":null,"spread":false},{"title":"trunk","children":[{"title":"bench","children":[{"title":"timescale.v <span style='color:#111;'> 20B </span>","children":null,"spread":false},{"title":"PID_tb.v <span style='color:#111;'> 3.81KB </span>","children":null,"spread":false},{"title":"wb_master.v <span style='color:#111;'> 6.24KB </span>","children":null,"spread":false}],"spread":true},{"title":"doc","children":[{"title":"PID_controller_UM.pdf <span style='color:#111;'> 490.86KB </span>","children":null,"spread":false}],"spread":true},{"title":"RTL","children":[{"title":"16x16bit_multiplier_pipelined.v <span style='color:#111;'> 30.35KB </span>","children":null,"spread":false},{"title":"PID_defines.v <span style='color:#111;'> 109B </span>","children":null,"spread":false},{"title":"CLA_fixed.v <span style='color:#111;'> 10.00KB </span>","children":null,"spread":false},{"title":"PID.v <span style='color:#111;'> 8.69KB </span>","children":null,"spread":false},{"title":"booth.v <span style='color:#111;'> 505B </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"branches","children":null,"spread":false}],"spread":true}],"spread":true}]