UART串口Verilog通信cpld quartus10.1逻辑工程源码+自定义uart协议说明.zip

[{"title":"（ 93 个子文件 592KB ） UART串口Verilog通信cpld quartus10.1逻辑工程源码+自定义uart协议说明.zip","children":[{"title":"Uart_Ctrl 工程文件","children":[{"title":"Uart_Ctrl_MD_top.sta.rpt <span style='color:#111;'> 71.14KB </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.v <span style='color:#111;'> 3.44KB </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.qsf <span style='color:#111;'> 6.32KB </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.pof <span style='color:#111;'> 7.69KB </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.dpf <span style='color:#111;'> 239B </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.map.summary <span style='color:#111;'> 328B </span>","children":null,"spread":false},{"title":"Uart_Ctrl_MD_top.fit.smsg <span style='color:#111;'> 409B </span>","children":null,"spread":false},{"title":"rs232rx.v <span style='color:#111;'> 6.22KB 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