max10_10m50 FPGA开发板CADENCE 硬件原理图+PCB文件.zip

上传者: GJZGRB | 上传时间: 2021-01-30 14:08:03 | 文件大小: 42.15MB | 文件类型: ZIP
max10_10m50 FPGA开发板CADENCE 硬件原理图+PCB文件,Cadence Allegro设计文件,可作为你产品设计的参考。

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[{"title":"( 69 个子文件 42.15MB ) max10_10m50 FPGA开发板CADENCE 硬件原理图+PCB文件.zip","children":[{"title":"max10_10m50daf484c6ges_fpga","children":[{"title":"demos","children":[{"title":"readme.txt <span style='color:#111;'> 137B </span>","children":null,"spread":false}],"spread":true},{"title":"board_design_files","children":[{"title":"max10_10m50daf484c6ges","children":[{"title":"bom","children":[{"title":"6XX-44292R_0B.xlsx <span style='color:#111;'> 21.53KB </span>","children":null,"spread":false}],"spread":true},{"title":"schematic","children":[{"title":"max10_dk_c.pdf <span style='color:#111;'> 363.33KB </span>","children":null,"spread":false},{"title":"MAX10_DK_C.DSN <span style='color:#111;'> 12.74MB </span>","children":null,"spread":false}],"spread":true},{"title":"assembly","children":[{"title":"adb.pdf <span style='color:#111;'> 136.38KB </span>","children":null,"spread":false},{"title":"adt.pdf <span style='color:#111;'> 341.09KB </span>","children":null,"spread":false}],"spread":true},{"title":"layout","children":[{"title":"max10_dk_c.brd <span style='color:#111;'> 11.50MB </span>","children":null,"spread":false}],"spread":true},{"title":"signal_integrity","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"factory_recovery","children":[{"title":"software_resources","children":[{"title":"m10_fpga_html.zip <span style='color:#111;'> 646.06KB </span>","children":null,"spread":false}],"spread":true},{"title":"dual_boot_image.pof <span style='color:#111;'> 1.38MB </span>","children":null,"spread":false},{"title":"dual_boot_image.map <span style='color:#111;'> 474B </span>","children":null,"spread":false},{"title":"build_factory_source","children":[{"title":"m10_fpga_html.zip <span style='color:#111;'> 646.06KB </span>","children":null,"spread":false},{"title":"ext_flash.flash <span style='color:#111;'> 1003.11KB </span>","children":null,"spread":false},{"title":"web_server.elf <span style='color:#111;'> 2.41MB </span>","children":null,"spread":false}],"spread":true},{"title":"readme.txt <span style='color:#111;'> 1.97KB </span>","children":null,"spread":false}],"spread":true},{"title":"examples","children":[{"title":"board_update_portal","children":[{"title":"bup_etha.sof <span style='color:#111;'> 3.23MB </span>","children":null,"spread":false},{"title":"m10_rgmii_etherneta_bup.zip <span style='color:#111;'> 5.88MB </span>","children":null,"spread":false},{"title":"m10_rgmii_ethernetb_bup.zip <span style='color:#111;'> 5.83MB </span>","children":null,"spread":false},{"title":"bup_ethb.elf <span style='color:#111;'> 2.39MB </span>","children":null,"spread":false},{"title":"bup_ethb.sof <span style='color:#111;'> 3.23MB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 487B </span>","children":null,"spread":false},{"title":"bup_etha.elf <span style='color:#111;'> 2.41MB </span>","children":null,"spread":false}],"spread":true},{"title":"golden_top","children":[{"title":"max10_top.v <span style='color:#111;'> 3.21KB </span>","children":null,"spread":false},{"title":"max10_top.qsf <span style='color:#111;'> 45.93KB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 442B </span>","children":null,"spread":false},{"title":"max10_top.qpf <span style='color:#111;'> 1.32KB </span>","children":null,"spread":false}],"spread":true},{"title":"board_test_system","children":[{"title":"sof","children":[{"title":"ddr3.sof <span style='color:#111;'> 3.23MB </span>","children":null,"spread":false},{"title":"sleep_mode.sof <span style='color:#111;'> 3.10MB </span>","children":null,"spread":false},{"title":"bts_config.sof <span style='color:#111;'> 3.14MB </span>","children":null,"spread":false},{"title":"hdmi.sof <span style='color:#111;'> 3.12MB </span>","children":null,"spread":false},{"title":"hsmc.sof <span style='color:#111;'> 3.11MB </span>","children":null,"spread":false},{"title":"adc.sof <span style='color:#111;'> 3.11MB </span>","children":null,"spread":false}],"spread":true},{"title":"sleep_mode","children":[{"title":"sleep_mode.zip <span style='color:#111;'> 1.25MB </span>","children":null,"spread":false},{"title":"sleep_mode.sof <span style='color:#111;'> 3.10MB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 649B </span>","children":null,"spread":false}],"spread":true},{"title":"hdmi","children":[{"title":"hdmi.zip <span style='color:#111;'> 1.45MB </span>","children":null,"spread":false},{"title":"hdmi.sof <span style='color:#111;'> 3.12MB </span>","children":null,"spread":false}],"spread":true},{"title":"lib","children":[{"title":"com.altera.opencores_i2c.jar <span style='color:#111;'> 9.91KB </span>","children":null,"spread":false},{"title":"com.altera.bts.systemconsole.client.jar <span style='color:#111;'> 212.87KB </span>","children":null,"spread":false},{"title":"jcommon-1.0.23.jar <span style='color:#111;'> 322.51KB </span>","children":null,"spread":false},{"title":"junit-4.10.jar <span style='color:#111;'> 247.23KB </span>","children":null,"spread":false},{"title":"AbsoluteLayout.jar <span style='color:#111;'> 2.83KB </span>","children":null,"spread":false},{"title":"jfreechart-1.0.19.jar <span style='color:#111;'> 1.50MB </span>","children":null,"spread":false},{"title":"swing-layout-1.0.4.jar <span style='color:#111;'> 114.67KB </span>","children":null,"spread":false}],"spread":true},{"title":"PowerMonitor.exe <span style='color:#111;'> 20.00KB </span>","children":null,"spread":false},{"title":"ClockController.exe <span style='color:#111;'> 20.00KB </span>","children":null,"spread":false},{"title":"ddr3","children":[{"title":"ddr3.sof <span style='color:#111;'> 3.23MB </span>","children":null,"spread":false},{"title":"ddr3x24.zip <span style='color:#111;'> 2.81MB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 287B </span>","children":null,"spread":false}],"spread":false},{"title":"bts.jar <span style='color:#111;'> 990.47KB </span>","children":null,"spread":false},{"title":"BoardTestSystem.sh <span style='color:#111;'> 257B </span>","children":null,"spread":false},{"title":"bts_config","children":[{"title":"bts_config.zip <span style='color:#111;'> 823.77KB </span>","children":null,"spread":false},{"title":"bts_config.sof <span style='color:#111;'> 3.14MB </span>","children":null,"spread":false}],"spread":false},{"title":"adc","children":[{"title":"adc.zip <span style='color:#111;'> 580.16KB </span>","children":null,"spread":false},{"title":"adc.sof <span style='color:#111;'> 3.11MB </span>","children":null,"spread":false}],"spread":false},{"title":"BoardTestSystem.exe <span style='color:#111;'> 18.50KB </span>","children":null,"spread":false},{"title":"ClockController.sh <span style='color:#111;'> 269B </span>","children":null,"spread":false},{"title":"PowerMonitor.sh <span style='color:#111;'> 268B </span>","children":null,"spread":false},{"title":"hsmc","children":[{"title":"lvds","children":[{"title":"lvds_links_setup.tcl <span style='color:#111;'> 2.05KB </span>","children":null,"spread":false},{"title":"bts_hsmc_lvds.sof <span style='color:#111;'> 3.13MB </span>","children":null,"spread":false},{"title":"bts_hsmc_lvds.zip <span style='color:#111;'> 987.45KB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 920B </span>","children":null,"spread":false}],"spread":false},{"title":"cmos","children":[{"title":"cmos.zip <span style='color:#111;'> 629.42KB </span>","children":null,"spread":false},{"title":"hsmc.sof <span style='color:#111;'> 3.11MB </span>","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":false}],"spread":true},{"title":"documents","children":[{"title":"L01-44498-01_MAX10_FPGA_QSG.pdf <span style='color:#111;'> 873.44KB </span>","children":null,"spread":false},{"title":"guid.txt <span style='color:#111;'> 40B </span>","children":null,"spread":false},{"title":"L01-44497-00_Max10_FPGA_DK_DCL_FINAL_v2.pdf <span style='color:#111;'> 103.36KB </span>","children":null,"spread":false},{"title":"MAX10_FPGA_Development_Kit_User_Guide.pdf <span style='color:#111;'> 3.33MB </span>","children":null,"spread":false}],"spread":true},{"title":"readme.txt <span style='color:#111;'> 3.79KB </span>","children":null,"spread":false},{"title":"license.txt <span style='color:#111;'> 12.30KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]

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