基于TSMC.18工艺的LDO电路设计及其带隙基准模块与测试电路的实现

[{"title":"（ 6 个子文件 3.38MB ） 基于TSMC.18工艺的LDO电路设计及其带隙基准模块与测试电路的实现","children":[{"title":"基于TSMC.18工艺的LDO电路与低压差线性稳压器设计，模拟集成电路的cadence仿真与测试电路集于一体的设计研究.html <span style='color:#111;'> 2.16MB </span>","children":null,"spread":false},{"title":"基于TSMC.18工艺的LDO电路及低压差线性稳压器设计，模拟集成电路，含内置带隙基准模块及子模块测.docx <span style='color:#111;'> 37.31KB </span>","children":null,"spread":false},{"title":"模拟集成电路设计","children":[{"title":"2.jpg <span style='color:#111;'> 593.90KB </span>","children":null,"spread":false},{"title":"1.jpg <span style='color:#111;'> 590.41KB </span>","children":null,"spread":false},{"title":"3.jpg <span style='color:#111;'> 457.93KB </span>","children":null,"spread":false}],"spread":true},{"title":"723221585052.pdf <span style='color:#111;'> 117.27KB </span>","children":null,"spread":false}],"spread":true}]