Complete Digital Design - A Comprehensive Guide to Digital Electronics and Computer System Architecture
PART 1 Digital Fundamentals
Chapter 1 Digital Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Boolean Logic / 3
1.2 Boolean Manipulation / 7
1.3 The Karnaugh map / 8
1.4 Binary and Hexadecimal Numbering / 10
1.5 Binary Addition / 14
1.6 Subtraction and Negative Numbers / 15
1.7 Multiplication and Division / 17
1.8 Flip-Flops and Latches / 18
1.9 Synchronous Logic / 21
1.10 Synchronous Timing Analysis / 23
1.11 Clock Skew / 25
1.12 Clock Jitter / 27
1.13 Derived Logical Building Blocks / 28
Chapter 2 Integrated Circuits and the 7400 Logic Families. . . . . . . . . . . . . . . . . . . . .33
2.1 The Integrated Circuit / 33
2.2 IC Packaging / 38
2.3 The 7400-Series Discrete Logic Family / 41
2.4 Applying the 7400 Family to Logic Design / 43
2.5 Synchronous Logic Design with the 7400 Family / 45
2.6 Common Variants of the 7400 Family / 50
2.7 Interpreting a Digital IC Data Sheet / 51
Chapter 3 Basic Computer Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
3.1 The Digital Computer / 56
3.2 Microprocessor Internals / 58
3.3 Subroutines and the Stack / 60
3.4 Reset and Interrupts / 62
3.5 Implementation of an Eight-Bit Computer / 63
3.6 Address Banking / 67
3.7 Direct Memory Access / 68
3.8 Extending the Microprocessor Bus / 70
3.9 Assembly Language and Addressing Modes / 72
Chapter 4 Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
4.1 Memory Classifications / 77
4.2 EPROM / 79
4.3 Flash Memory / 81
4.4 EEPROM / 85
4.5 Asynchronous SRAM / 86
4.6 Asynchronous DRAM / 88
4.7 Multiport Memory / 92
4.8 The FIFO / 94
Chapter 5 Serial Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97
5.1 Serial vs. Parallel Communication / 98
5.2 The UART / 99
5.3 ASCII Data Rep
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